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whoops missing brackets
author
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 13 Nov 2018 15:52:26 +0000
(15:52 +0000)
committer
Luke Kenneth Casson Leighton
<lkcl@lkcl.net>
Tue, 13 Nov 2018 15:52:26 +0000
(15:52 +0000)
riscv/processor.cc
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diff --git
a/riscv/processor.cc
b/riscv/processor.cc
index 488a28302d7c1484d4d77a49cdfacfe34188fec7..bfc5259120c971672a771254afc0c508a72ed34c 100644
(file)
--- a/
riscv/processor.cc
+++ b/
riscv/processor.cc
@@
-547,7
+547,7
@@
reg_t processor_t::set_csr(int which, reg_t val, bool csrrwi)
state.get_csr_start_end(start, end);
uint64_t res_old = 0;
// read 2 16-bit entries for RV32, 4 16-bit entries for RV64
- for (int i = 0; i < (
xlen == 64) ? 4 : 2
; i++) {
+ for (int i = 0; i < (
(xlen == 64) ? 4 : 2)
; i++) {
uint64_t mask = 0xffffUL << (i*16UL);
uint64_t svcfg = get_field(v, mask);
fprintf(stderr, "SVREG mask %lx cfg %lx\n", mask, svcfg);