can find the real symbol and not a gas internal debug symbol.
* gas/m68hc11/insns.d: Update.
* gas/m68hc11/insns-dwarf2.d: Update.
* gas/m68hc11/insns12.d: Update.
* gas/m68hc11/opers12.s (min5b, min9b): Use 16 and -256 for the min.
* gas/m68hc11/opers12.d: Update after indexed offset operand fixes.
* gas/m68hc11/opers12-dwarf2.d: Likewise.
+2002-12-01 Stephane Carrez <stcarrez@nerim.fr>
+
+ * gas/m68hc11/insns.s: Don't use .comm for stack symbol so that objdump
+ can find the real symbol and not a gas internal debug symbol.
+ * gas/m68hc11/insns.d: Update.
+ * gas/m68hc11/insns-dwarf2.d: Update.
+ * gas/m68hc11/insns12.d: Update.
+ * gas/m68hc11/opers12.s (min5b, min9b): Use 16 and -256 for the min.
+ * gas/m68hc11/opers12.d: Update after indexed offset operand fixes.
+ * gas/m68hc11/opers12-dwarf2.d: Likewise.
+
2002-11-30 Kaz Kojima <kkojima@rr.iij4u.or.jp>
* sh/gas/sh/pic.s: Add a test for ".long foo@PLT+.-2-label".
_start:
lds #stack\+1024
- 0: 8e 04 00 lds #400 <.L0\ 1\+0x3a4>
+ 0: 8e 04 00 lds #400 <stack_end>
ldx #1
3: ce 00 01 ldx #1 <_start\+0x1>
brclr \*ZD2\+2, #40, test2
3d: 13 02 28 d6 brclr \*2 <_start\+0x2> #\$28 17 <test2>
ldy #24\+_start-44
- 41: 18 ce ff ec ldy #ffec <.L0\ 1\+0xff90>
+ 41: 18 ce ff ec ldy #ffec <stack_end\+0xfbec>
ldd B_low,y
45: 18 ec 0c ldd 12,y
addd A_low,y
.*: +file format elf32\-m68hc11
Disassembly of section .text:
-0+0+ <_start> lds #0+0400 <L1\+0x3a9>
+0+0+ <_start> lds #0+0400 <stack_end>
[ ]+1: R_M68HC11_16 stack
0+0003 <_start\+0x3> ldx #0+0001 <_start\+0x1>
0+0006 <Loop> jsr 0+0+ <_start>
0+003d <test2\+0x26> brclr \*0+0002 <_start\+0x2> #\$28 0+0017 <test2>
[ ]+3d: R_M68HC11_RL_JUMP \*ABS\*
[ ]+3e: R_M68HC11_8 ZD2
-0+0041 <test2\+0x2a> ldy #0+ffec <L1\+0xff95>
+0+0041 <test2\+0x2a> ldy #0+ffec <stack_end\+0xfbec>
[ ]+43: R_M68HC11_16 _start
0+0045 <test2\+0x2e> ldd 12,y
0+0048 <test2\+0x31> addd 44,y
.sect .data
-.comm stack, 1024
+ .sect .bss
+stack:
+ .space 1024
+stack_end:
ldd \[32768,pc\]
39: ec fb 80 00 ldd \[32768,PC\]
ldd L1,pc
- 3d: ec f8 09 ldd 9,PC
+ 3d: ec f9 ca ldd -54,PC \{9 <L1>\}
std a,x ; Two\-reg index
40: 6c e4 std A,X
ldx b,x
leax t2\-t1,y
f5: 1a 44 leax 4,Y
leax toto,x
- f7: 1a e2 00 64 leax 100,X
+ f7: 1a e0 64 leax 100,X
leas toto\+titi,sp
- fb: 1b f2 00 6e leas 110,SP
+ fa: 1b f0 6e leas 110,SP
leay titi,x
- ff: 19 e2 00 0a leay 10,X
+ fd: 19 0a leay 10,X
leas bb,y
- 103: 1b ea 28 00 leas 10240,Y
+ ff: 1b ea 28 00 leas 10240,Y
leas min5b,pc
- 107: 1b fa 00 ff leas 255,PC
+ 103: 1b d0 leas -16,PC \{f5 <t2>\}
leas max5b,pc
- 10b: 1b fa 00 00 leas 0,PC
+ 105: 1b cf leas 15,PC \{116 <t2\+0x21>\}
leas min9b,pc
- 10f: 1b fa 00 ff leas 255,PC
+ 107: 1b f9 00 leas -256,PC \{9 <L1>\}
leas max9b,pc
- 113: 1b fa 00 00 leas 0,PC
+ 10a: 1b f8 ff leas 255,PC \{20b <.L0\ 1\+0xd8>\}
;;
;; Disassembler bug with movb
;;
movb #23,0x2345
- 117: 18 0b 17 23 movb #23, 2345 <.L0\ 1\+0x2208>
- 11b: 45
+ 10d: 18 0b 17 23 movb #23, 2345 <.L0\ 1\+0x2212>
+ 111: 45
movb #40,12,sp
- 11c: 18 08 8c 28 movb #40, 12,SP
+ 112: 18 08 8c 28 movb #40, 12,SP
movb #39,3,\+sp
- 120: 18 08 a2 27 movb #39, 3,\+SP
+ 116: 18 08 a2 27 movb #39, 3,\+SP
movb #20,14,sp
- 124: 18 08 8e 14 movb #20, 14,SP
+ 11a: 18 08 8e 14 movb #20, 14,SP
movw #0x3210,0x3456
- 128: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
- 12c: 34 56
+ 11e: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
+ 122: 34 56
movw #0x4040,12,sp
- 12e: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
- 132: 40
+ 124: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
+ 128: 40
movw #0x3900,3,\+sp
- 133: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
- 137: 00
+ 129: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
+ 12d: 00
movw #0x2000,14,sp
- 138: 18 00 8e 20 movw #2000 <.L0\ 1\+0x1ec3>, 14,SP
- 13c: 00
+ 12e: 18 00 8e 20 movw #2000 <.L0\ 1\+0x1ecd>, 14,SP
+ 132: 00
#objdump: -d --prefix-addresses --reloc
#as: -m68hc12
-#name: opers
+#name: 68HC12 specific addressing modes (opers12)
.*: +file format elf32\-m68hc12
0+0031 <L1\+0x28> ldaa \[257,Y\]
0+0035 <L1\+0x2c> ldab \[32767,SP\]
0+0039 <L1\+0x30> ldd \[32768,PC\]
-0+003d <L1\+0x34> ldd 9,PC
-[ ]+3f: R_M68HC12_8 \.text
+0+003d <L1\+0x34> ldd \-54,PC \{0+9 <L1>\}
0+0040 <L1\+0x37> std A,X
0+0042 <L1\+0x39> ldx B,X
0+0044 <L1\+0x3b> stx D,Y
[ ]+f3: R_M68HC12_16 abort
0+00f5 <t2> leax 4,Y
0+00f7 <t2\+0x2> leax 100,X
-0+00fb <t2\+0x6> leas 110,SP
-0+00ff <t2\+0xa> leay 10,X
-0+0103 <t2\+0xe> leas 10240,Y
-0+0107 <t2\+0x12> leas 255,PC
-0+010b <t2\+0x16> leas 0,PC
-0+010f <t2\+0x1a> leas 255,PC
-0+0113 <t2\+0x1e> leas 0,PC
-0+0117 <t2\+0x22> movb #23, 0+2345 <max9b\+0x2246>
-0+011c <t2\+0x27> movb #40, 12,SP
-0+0120 <t2\+0x2b> movb #39, 3,\+SP
-0+0124 <t2\+0x2f> movb #20, 14,SP
-0+0128 <t2\+0x33> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56>
-0+012e <t2\+0x39> movw #0+4040 <bb\+0x1840>, 12,SP
-0+0133 <t2\+0x3e> movw #0+3900 <bb\+0x1100>, 3,\+SP
-0+0138 <t2\+0x43> movw #0+2000 <max9b\+0x1f01>, 14,SP
+0+00fa <t2\+0x5> leas 110,SP
+0+00fd <t2\+0x8> leay 10,X
+0+00ff <t2\+0xa> leas 10240,Y
+0+0103 <t2\+0xe> leas -16,PC \{0+f5 <t2>\}
+0+0105 <t2\+0x10> leas 15,PC \{0+116 <t2\+0x21>\}
+0+0107 <t2\+0x12> leas -256,PC \{0+9 <L1>\}
+0+010a <t2\+0x15> leas 255,PC \{0+20b <max9b\+0x10c>\}
+0+010d <t2\+0x18> movb #23, 0+2345 <max9b\+0x2246>
+0+0112 <t2\+0x1d> movb #40, 12,SP
+0+0116 <t2\+0x21> movb #39, 3,\+SP
+0+011a <t2\+0x25> movb #20, 14,SP
+0+011e <t2\+0x29> movw #0+3210 <bb\+0xa10>, 0+3456 <bb\+0xc56>
+0+0124 <t2\+0x2f> movw #0+4040 <bb\+0x1840>, 12,SP
+0+0129 <t2\+0x34> movw #0+3900 <bb\+0x1100>, 3,\+SP
+0+012e <t2\+0x39> movw #0+2000 <max9b\+0x1f01>, 14,SP
titi = 10
toto = 100
-min5b= -15
+min5b= -16
max5b= 15
-min9b= -255
+min9b= -256
max9b= 255
bb = 10240