unsigned flags = absolute ? AMDGPU_QUERY_FENCE_TIMEOUT_IS_ABSOLUTE : 0;
int r;
uint32_t expired = 0;
+
/* Now use the libdrm query. */
r = amdgpu_cs_query_fence_status(fence,
timeout,
return false;
}
- if (expired) {
+ if (expired)
return true;
- }
- return false;
+ return false;
}
static void radv_amdgpu_cs_destroy(struct radeon_winsys_cs *rcs)
{
struct radv_amdgpu_cs *cs = radv_amdgpu_cs(rcs);
+
if (cs->ib_buffer)
cs->ws->base.buffer_destroy(cs->ib_buffer);
else
for (unsigned i = 0; i < cs->num_old_ib_buffers; ++i)
cs->ws->base.buffer_destroy(cs->old_ib_buffers[i]);
+
free(cs->old_ib_buffers);
free(cs->handles);
free(cs->priorities);
static boolean radv_amdgpu_init_cs(struct radv_amdgpu_cs *cs,
enum ring_type ring_type)
{
- for (int i = 0; i < ARRAY_SIZE(cs->buffer_hash_table); ++i) {
+ for (int i = 0; i < ARRAY_SIZE(cs->buffer_hash_table); ++i)
cs->buffer_hash_table[i] = -1;
- }
+
return true;
}
if (index == -1)
return -1;
- if(cs->handles[index] == bo)
+ if (cs->handles[index] == bo)
return index;
for (unsigned i = 0; i < cs->num_buffers; ++i) {
return i;
}
}
+
return -1;
}
free(handles);
free(priorities);
}
+
return r;
}
#include <amdgpu.h>
#include "radv_radeon_winsys.h"
-
#include "radv_amdgpu_winsys.h"
+
struct radv_amdgpu_ctx {
struct radv_amdgpu_winsys *ws;
amdgpu_context_handle ctx;
*/
#include <errno.h>
+
#include "radv_private.h"
#include "addrlib/addrinterface.h"
#include "util/bitset.h"
#include "radv_amdgpu_winsys.h"
#include "radv_amdgpu_surface.h"
#include "sid.h"
+
#ifndef NO_ENTRIES
#define NO_ENTRIES 32
#endif
ret = AddrComputeSurfaceInfo(addrlib,
AddrSurfInfoIn,
AddrSurfInfoOut);
- if (ret != ADDR_OK) {
+ if (ret != ADDR_OK)
return ret;
- }
surf_level = is_stencil ? &surf->stencil_level[level] : &surf->level[level];
surf_level->offset = align64(surf->bo_size, AddrSurfInfoOut->baseAlign);
default:
assert(0);
}
- }
- else {
+ } else {
AddrDccIn.bpp = AddrSurfInfoIn.bpp = surf->bpe * 8;
}
#include "radv_amdgpu_cs.h"
#include "radv_amdgpu_bo.h"
#include "radv_amdgpu_surface.h"
+
#define CIK_TILE_MODE_COLOR_2D 14
#define CIK__GB_TILE_MODE__PIPE_CONFIG(x) (((x) >> 6) & 0x1f)
if (!ws)
return NULL;
-
ws->dev = dev;
ws->info.drm_major = drm_major;
ws->info.drm_minor = drm_minor;
radv_amdgpu_bo_init_functions(ws);
radv_amdgpu_cs_init_functions(ws);
radv_amdgpu_surface_init_functions(ws);
+
return &ws->base;
fail:
return NULL;