Properly handle ljmp/lcall with invalid MODRM byte

gas/testsuite/

2013-12-17  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* gas/i386/disassem.s: New.
	* gas/i386/disassem.d: Likewise.
	* gas/i386/x86-64-disassem.s: Likewise.
	* gas/i386/x86-64-disassem.d: Likewise.
	* gas/i386/i386.exp: Run disassem and x86-64-disassem.

opcodes/

2013-12-17  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>

	* i386-dis.c (MOD_FF_REG_3): New.
	(MOD_FF_REG_5): Likewise.
	(mod_table): Add MOD_FF_REG_3 and MOD_FF_REG_5.
	(reg_table): Use MOD_FF_REG_3 and MOD_FF_REG_5.

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index be6129947203c52637d1efa21b6816291557149d..194a47a87c79976829702ed6f711e013ca8cb690 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,11 @@
+2013-12-17  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
+
+       * gas/i386/disassem.s: New.
+       * gas/i386/disassem.d: Likewise.
+       * gas/i386/x86-64-disassem.s: Likewise.
+       * gas/i386/x86-64-disassem.d: Likewise.
+       * gas/i386/i386.exp: Run disassem and x86-64-disassem.
+
 2013-12-16  Andrew Bennett  <andrew.bennett@imgtec.com>
 
        * gas/mips/mips.exp: Add CP1 register name tests.

diff --git a/gas/testsuite/gas/i386/disassem.d b/gas/testsuite/gas/i386/disassem.d
new file mode 100644 (file)
index 0000000..d8c6d61
--- /dev/null
+++ b/gas/testsuite/gas/i386/disassem.d
@@ -0,0 +1,14 @@
+#objdump: -drw
+#name: opcodes with invalid modrm byte
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+[      ]*[a-f0-9]+:[   ]*ff[   ]*\(bad\)  
+[      ]*[a-f0-9]+:[   ]*ef[   ]*out    %eax,\(%dx\)
+[      ]*[a-f0-9]+:[   ]*ff[   ]*\(bad\)  
+[      ]*[a-f0-9]+:[   ]*d8[   ]*\.byte 0xd8
+#pass

diff --git a/gas/testsuite/gas/i386/disassem.s b/gas/testsuite/gas/i386/disassem.s
new file mode 100644 (file)
index 0000000..81b0ef3
--- /dev/null
+++ b/gas/testsuite/gas/i386/disassem.s
@@ -0,0 +1,3 @@
+.text
+.byte 0xFF, 0xEF
+.byte 0xFF, 0xD8

diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 1fb27959b09e9153be859efee255df97bd78b8a2..4326838a3b230afdd41e97b54b648b4a8ff62438 100644 (file)
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -269,6 +269,7 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
     run_list_test "mpx-inval-1" "-al"
     run_dump_test "mpx-add-bnd-prefix"
     run_dump_test "sha"
+    run_dump_test "disassem"
 
     # These tests require support for 8 and 16 bit relocs,
     # so we only run them for ELF and COFF targets.
@@ -557,6 +558,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
     run_dump_test "x86-64-mpx-addr32"
     run_dump_test "x86-64-mpx-add-bnd-prefix"
     run_dump_test "x86-64-sha"
+    run_dump_test "x86-64-disassem"
 
     if { ![istarget "*-*-aix*"]
       && ![istarget "*-*-beos*"]

diff --git a/gas/testsuite/gas/i386/x86-64-disassem.d b/gas/testsuite/gas/i386/x86-64-disassem.d
new file mode 100644 (file)
index 0000000..8662af9
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-disassem.d
@@ -0,0 +1,14 @@
+#objdump: -drw
+#name: x86-64 opcodes with invalid modrm byte
+
+.*: +file format .*
+
+
+Disassembly of section \.text:
+
+0+ <\.text>:
+[      ]*[a-f0-9]+:[   ]*ff[   ]*\(bad\)  
+[      ]*[a-f0-9]+:[   ]*ef[   ]*out    %eax,\(%dx\)
+[      ]*[a-f0-9]+:[   ]*ff[   ]*\(bad\)  
+[      ]*[a-f0-9]+:[   ]*d8[   ]*\.byte 0xd8
+#pass

diff --git a/gas/testsuite/gas/i386/x86-64-disassem.s b/gas/testsuite/gas/i386/x86-64-disassem.s
new file mode 100644 (file)
index 0000000..81b0ef3
--- /dev/null
+++ b/gas/testsuite/gas/i386/x86-64-disassem.s
@@ -0,0 +1,3 @@
+.text
+.byte 0xFF, 0xEF
+.byte 0xFF, 0xD8

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 9ee7c75b026403b7b007be61a6250a985cfebcd0..d944dfd937d54378532ebf21eb83a1bbd7b26354 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2013-12-17  Michael Zolotukhin  <michael.v.zolotukhin@gmail.com>
+
+       * i386-dis.c (MOD_FF_REG_3): New.
+       (MOD_FF_REG_5): Likewise.
+       (mod_table): Add MOD_FF_REG_3 and MOD_FF_REG_5.
+       (reg_table): Use MOD_FF_REG_3 and MOD_FF_REG_5.
+
 2013-12-16  Andrew Bennett  <andrew.bennett@imgtec.com>
 
        * mips-dis.c: Add mips_cp1_names pointer.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 8e55724477a27cc73a0ac7430ecefa5cebff7a53..2c28e52cc89666bf64da9b141a0050c03adbf4a8 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -715,6 +715,8 @@ enum
   MOD_8D = 0,
   MOD_C6_REG_7,
   MOD_C7_REG_7,
+  MOD_FF_REG_3,
+  MOD_FF_REG_5,
   MOD_0F01_REG_0,
   MOD_0F01_REG_1,
   MOD_0F01_REG_2,
@@ -3229,9 +3231,9 @@ static const struct dis386 reg_table[][8] = {
     { "incQ",  { Evh1 } },
     { "decQ",  { Evh1 } },
     { "call{T|}", { indirEv, BND } },
-    { "Jcall{T|}", { indirEp } },
+    { MOD_TABLE (MOD_FF_REG_3) },
     { "jmp{T|}", { indirEv, BND } },
-    { "Jjmp{T|}", { indirEp } },
+    { MOD_TABLE (MOD_FF_REG_5) },
     { "pushU", { stackEv } },
     { Bad_Opcode },
   },
@@ -11049,6 +11051,14 @@ static const struct dis386 mod_table[][2] = {
     { Bad_Opcode },
     { RM_TABLE (RM_C7_REG_7) },
   },
+  {
+    /* MOD_FF_REG_3 */
+    { "Jcall{T|}", { indirEp } },
+  },
+  {
+    /* MOD_FF_REG_5 */
+    { "Jjmp{T|}", { indirEp } },
+  },
   {
     /* MOD_0F01_REG_0 */
     { X86_64_TABLE (X86_64_0F01_REG_0) },