added english language description for ldsux instruction

diff --git a/openpower/isa/fixedloadshift.mdwn b/openpower/isa/fixedloadshift.mdwn
index f7df8135c5127f60d08d56bd871e3040f6b71def..4423123a98b813bc63abd29a26e2fbb42b954fa7 100644 (file)
--- a/openpower/isa/fixedloadshift.mdwn
+++ b/openpower/isa/fixedloadshift.mdwn
@@ -321,6 +321,17 @@ Pseudo-code:
     RT <- MEM(EA, 8)
     RA <- EA
 
+Description:
+
+    Let the effective address (EA) be the sum of the contents of
+    register RB shifted by (SH+1), and (RA).
+
+    The doubleword in storage addressed by EA is loaded into RT.
+
+    EA is placed into register RA.
+
+    If RA=0 or RA=RT, the instruction form is invalid.
+
 Special Registers Altered:
 
     None