* config/tc-h8300.h: Fix formatting.
* config/tc-h8500.c: Likewise.
* config/tc-h8500.h: Likewise.
* config/tc-hppa.h: Likewise.
* config/tc-i370.h: Likewise.
* config/tc-i386.h: Likewise.
* config/tc-i860.c: Likewise.
* config/tc-i860.h: Likewise.
* config/tc-i960.h: Likewise.
* config/tc-ia64.c: Likewise.
* config/tc-ia64.h: Likewise.
+2000-09-15 Kazu Hirata <kazu@hxi.com>
+
+ * config/tc-h8300.h: Fix formatting.
+ * config/tc-h8500.c: Likewise.
+ * config/tc-h8500.h: Likewise.
+ * config/tc-hppa.h: Likewise.
+ * config/tc-i370.h: Likewise.
+ * config/tc-i386.h: Likewise.
+ * config/tc-i860.c: Likewise.
+ * config/tc-i860.h: Likewise.
+ * config/tc-i960.h: Likewise.
+ * config/tc-ia64.c: Likewise.
+ * config/tc-ia64.h: Likewise.
+
2000-09-14 Kazu Hirata <kazu@hxi.com>
* config/tc-a29k.c: Fix formatting.
/* This file is tc-h8300.h
- Copyright (C) 1987-1992, 93, 94, 95, 96, 97, 1998
+ Copyright (C) 1987-1992, 93, 94, 95, 96, 97, 98, 2000
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
-
#define TC_H8300
#define TARGET_BYTES_BIG_ENDIAN 1
extern int Smode;
#define md_operand(x)
-
-/* end of tc-h8300.h */
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
-/*
- Written By Steve Chamberlain
- sac@cygnus.com
- */
+/* Written By Steve Chamberlain <sac@cygnus.com>. */
#include <stdio.h>
#include "as.h"
exp_signed, exp_unsigned, exp_sandu
} sign_type;
-
static char *
skip_colonthing (sign, ptr, exp, def, size8, size16, size24)
sign_type sign;
*buffer++ = 0x04; /* cmp #0xff:8, rn */
*buffer++ = 0xff;
*buffer++ = 0x70 | rn;
- *buffer++ = 0x36; /* bne ... */
+ *buffer++ = 0x36; /* bne ... */
*buffer++ = 0;
*buffer++ = 0;
}
/* This file is tc-h8500.h
- Copyright (C) 1993, 95, 97, 1998 Free Software Foundation, Inc.
+ Copyright (C) 1993, 95, 97, 98, 2000 Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
-
#define TC_H8500
#define TARGET_BYTES_BIG_ENDIAN 1
extern struct relax_type md_relax_table[];
#define TC_GENERIC_RELAX_TABLE md_relax_table
-
-/* end of tc-h8500.h */
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
-
/* HP PA-RISC support was contributed by the Center for Software Science
at the University of Utah. */
(please PARAMize them!) not exporting structures and data items which
are used solely within tc-hppa.c, etc.
- Also refrain from adding any more object file dependent code, there is
+ Also refrain from adding any more object file dependent code, there is
already far too much object file format dependent code in this file.
In theory this file should contain only exported functions, structures
and data declarations common to all PA assemblers. */
/* We need to be able to make relocations involving the difference of
two symbols. This includes the difference of two symbols when
- one of them is undefined (this comes up in PIC code generation).
+ one of them is undefined (this comes up in PIC code generation).
We don't define DIFF_EXPR_OK because it does the wrong thing if
the add symbol is undefined and the sub symbol is a symbol in
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ 02111-1307, USA. */
#define TC_I370
#endif
/* This is the relocation type for direct references to GLOBAL_OFFSET_TABLE.
- * It comes up in complicated expressions such as
+ * It comes up in complicated expressions such as
* _GLOBAL_OFFSET_TABLE_+[.-.L284], which cannot be expressed normally with
- * the regular expressions. The fixup specified here when used at runtime
+ * the regular expressions. The fixup specified here when used at runtime
* implies that we should add the address of the GOT to the specified location,
* and as a result we have simplified the expression into something we can use.
*/
are willing to perform this relocation while building the .o file.
This is only used for pcrel relocations, so GOTOFF does not need to be
checked here. I am not sure if some of the others are ever used with
- pcrel, but it is easier to be safe than sorry. */
+ pcrel, but it is easier to be safe than sorry. */
#define TC_RELOC_RTSYM_LOC_FIXUP(FIX) \
((FIX)->fx_r_type != BFD_RELOC_386_PLT32 \
/* Need this for PIC relocations */
#define NEED_FX_R_TYPE
-
#ifdef TE_386BSD
/* The BSDI linker apparently rejects objects with a machine type of
M_386 (100). */
/* Prefixes will be emitted in the order defined below.
WAIT_PREFIX must be the first prefix since FWAIT is really is an
- instruction, and so must come before any prefixes. */
+ instruction, and so must come before any prefixes. */
#define WAIT_PREFIX 0
#define LOCKREP_PREFIX 1
#define ADDR_PREFIX 2
#define FLAT 7
#define NONE_FOUND 8
-
typedef struct
{
/* instruction name sans width suffix ("mov" for movl insns) */
AMD 3DNow! instructions.
If this template has no extension opcode (the usual case) use None */
unsigned int extension_opcode;
-#define None 0xffff /* If no extension_opcode is possible. */
+#define None 0xffff /* If no extension_opcode is possible. */
/* cpu feature flags */
unsigned int cpu_flags;
#define FloatR 0x8 /* src/dest swap for floats: MUST BE 0x8 */
#define ShortForm 0x10 /* register is in low 3 bits of opcode */
#define FloatMF 0x20 /* FP insn memory format bit, sized by 0x4 */
-#define Jump 0x40 /* special case for jump insns. */
+#define Jump 0x40 /* special case for jump insns. */
#define JumpDword 0x80 /* call and jump */
#define JumpByte 0x100 /* loop and jecxz */
#define JumpInterSegment 0x200 /* special case for intersegment leaps/calls */
#define FloatD 0x400 /* direction for float insns: MUST BE 0x400 */
#define Seg2ShortForm 0x800 /* encoding of load segment reg insns */
-#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */
+#define Seg3ShortForm 0x1000 /* fs/gs segment register insns. */
#define Size16 0x2000 /* needs size prefix if in 32-bit mode */
#define Size32 0x4000 /* needs size prefix if in 16-bit mode */
#define IgnoreSize 0x8000 /* instruction ignores operand size prefix */
}
seg_entry;
-/* 386 operand encoding bytes: see 386 book for details of this. */
+/* 386 operand encoding bytes: see 386 book for details of this. */
typedef struct
{
unsigned int regmem; /* codes register or memory operand */
}
modrm_byte;
-/* 386 opcode byte to code indirect addressing. */
+/* 386 opcode byte to code indirect addressing. */
typedef struct
{
unsigned base;
arch_entry;
/* The name of the global offset table generated by the compiler. Allow
- this to be overridden if need be. */
+ this to be overridden if need be. */
#ifndef GLOBAL_OFFSET_TABLE_NAME
#define GLOBAL_OFFSET_TABLE_NAME "_GLOBAL_OFFSET_TABLE_"
#endif
#endif
#define DIFF_EXPR_OK /* foo-. gets turned into PC relative relocs */
-
-/* end of tc-i386.h */
#include "opcode/i860.h"
#include "elf/i860.h"
-
/* Defined by default since this is primarily a SVR4/860 assembler.
However, I'm trying to leave the door open for Intel syntax. Of course,
if full support for anything other than SVR4 is done, then we should
select this based on a command-line flag. */
#define SYNTAX_SVR4
-
/* The opcode hash table. */
static struct hash_control *op_hash = NULL;
As in 0f12.456 or 0d1.2345e12. */
const char FLT_CHARS[] = "rRsSfFdDxXpP";
-
/* Register prefix. */
#ifdef SYNTAX_SVR4
static const char reg_prefix = '%';
static const char reg_prefix = 0;
#endif
-
struct i860_it
{
char *error;
/* If true, then warn if any pseudo operations were expanded. */
static int target_warn_expand = 0;
-
/* Prototypes. */
static void i860_process_insn PARAMS ((char *));
static void s_dual PARAMS ((int));
static void print_insn PARAMS ((struct i860_it *));
#endif
-
const pseudo_typeS md_pseudo_table[] =
{
#ifdef OBJ_ELF
{NULL, 0, 0},
};
-
/* Dual-instruction mode handling. */
enum dual
{
};
static enum dual dual_mode = DUAL_OFF;
-
/* Handle ".dual" directive. */
static void
s_dual (ignore)
dual_mode = DUAL_ON;
}
-
/* Handle ".enddual" directive. */
static void
s_enddual (ignore)
dual_mode = DUAL_OFF;
}
-
/* Temporary register used when expanding assembler pseudo operations. */
static int atmp = 31;
demand_empty_rest_of_line ();
}
-
/* This function is called once, at assembler startup time. It should
set up all the tables and data structures that the MD part of the
assembler will need. */
as_fatal (_("Defective assembler. No assembly attempted."));
}
-
/* This is the core of the machine-dependent assembler. STR points to a
machine dependent instruction. This function emits the frags/bytes
it assembles to. */
the_insn.reloc);
/* Despite the odd name, this is a scratch field. We use
- it to encode operand type information. */
+ it to encode operand type information. */
fix->fx_addnumber = the_insn.fup;
}
the_insn = pseudo[++i];
}
-
/* Assemble the instruction pointed to by STR. */
static void
i860_process_insn (str)
the_insn.opcode = opcode;
}
-
static int
i860_get_expression (str)
char *str;
return 0;
}
-
/* Turn a string in input_line_pointer into a floating point constant of
type TYPE, and store the appropriate bytes in *LITP. The number of
LITTLENUMS emitted is stored in *SIZEP. An error message is returned,
return 0;
}
-
/* Write out in current endian mode. */
void
md_number_to_chars (buf, val, n)
number_to_chars_littleendian (buf, val, n);
}
-
/* This should never be called for i860. */
void
md_number_to_disp (buf, val, n)
as_fatal (_("md_number_to_disp\n"));
}
-
/* This should never be called for i860. */
void
md_number_to_field (buf, val, fix)
as_fatal (_("i860_number_to_field\n"));
}
-
/* This should never be called for i860. */
int
md_estimate_size_before_relax (fragP, segtype)
as_fatal (_("i860_estimate_size_before_relax\n"));
}
-
#ifdef DEBUG_I860
static void
print_insn (insn)
}
#endif /* DEBUG_I860 */
-
\f
#ifdef OBJ_ELF
CONST char *md_shortopts = "VQ:";
CONST char *md_shortopts = "";
#endif
-
#define OPTION_EB (OPTION_MD_BASE + 0)
#define OPTION_EL (OPTION_MD_BASE + 1)
#define OPTION_WARN_EXPAND (OPTION_MD_BASE + 2)
};
size_t md_longopts_size = sizeof (md_longopts);
-
int
md_parse_option (c, arg)
int c;
return 1;
}
-
void
md_show_usage (stream)
FILE *stream;
return 0;
}
-
/* The i860 denotes auto-increment with '++'. */
void
md_operand (exp)
}
}
-
/* Round up a section size to the appropriate boundary. */
valueT
md_section_align (segment, size)
return size;
}
-
/* On the i860, a PC-relative offset is relative to the address of the
of the offset plus its size. */
long
return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
}
-
/* Determine the relocation needed for non PC-relative 16-bit immediates.
Also adjust the given immediate as necessary. Finally, check that
all constraints (such as alignment) are satisfied. */
long *val;
{
valueT fup = fix->fx_addnumber;
- bfd_reloc_code_real_type reloc;
+ bfd_reloc_code_real_type reloc;
if (fix->fx_pcrel)
abort ();
return reloc;
}
-
/* Attempt to simplify or eliminate a fixup. To indicate that a fixup
has been eliminated, set fix->fx_done. If fix->fx_addsy is non-NULL,
we will have to generate a reloc entry. */
fix->fx_r_type = BFD_RELOC_NONE;
fix->fx_done = 1;
}
- }
+ }
else if (fup & OP_IMM_BR16)
{
if (val & 0x3)
}
else if (fup != OP_NONE)
{
- as_bad_where (fix->fx_file, fix->fx_line,
+ as_bad_where (fix->fx_file, fix->fx_line,
_("Unrecognized fix-up (0x%08x)"), fup);
abort ();
}
return 0;
}
-
/* Generate a machine dependent reloc from a fixup. */
arelent*
tc_gen_reloc (section, fixp)
}
return reloc;
}
-
Brought back from the dead and completely reworked
by Jason Eckhardt <jle@cygnus.com>.
-
+
This file is part of GAS, the GNU Assembler.
GAS is free software; you can redistribute it and/or modify
#ifndef TC_I860
#define TC_I860 1
-
#ifndef BFD_ASSEMBLER
#error i860 support requires BFD_ASSEMBLER
#endif
-
-enum i860_fix_info
+enum i860_fix_info
{
OP_NONE = 0x00000,
OP_IMM_U5 = 0x00001,
OP_ALIGN16 = 0x40000
};
-
/* Set the endianness we are using. Default to little endian. */
#ifndef TARGET_BYTES_BIG_ENDIAN
#define TARGET_BYTES_BIG_ENDIAN 0
#define md_convert_frag(b,s,f) as_fatal (_("i860_convert_frag\n"));
#endif /* TC_I860 */
-
/* tc-i960.h - Basic 80960 instruction formats.
- Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 96, 97, 98, 1999
+ Copyright (C) 1989, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA. */
+ 02111-1307, USA. */
#ifndef TC_I960
#define TC_I960 1
#define N_CALLNAME ((char)-1)
#define N_BALNAME ((char)-2)
-/* i960 uses a custom relocation record. */
+/* i960 uses a custom relocation record. */
/* let obj-aout.h know */
#define CUSTOM_RELOC_FORMAT 1
#define TC_INIT_FIX_DATA(F) ((F)->tc_fix_data.bsr = 0)
#endif
-
-/* end of tc-i960.h */
&& p1 != 0 && p1 != 63)
{
specs[count] = tmpl;
- specs[count].cmp_type =
+ specs[count].cmp_type =
(or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
specs[count++].index = p1;
}
&& p2 != 0 && p2 != 63)
{
specs[count] = tmpl;
- specs[count].cmp_type =
+ specs[count].cmp_type =
(or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
specs[count++].index = p2;
}
int or_andcm = strstr(idesc->name, "or.andcm") != NULL;
int and_orcm = strstr(idesc->name, "and.orcm") != NULL;
- if (p1 == 63
+ if (p1 == 63
&& (idesc->operands[0] == IA64_OPND_P1
|| idesc->operands[0] == IA64_OPND_P2))
{
specs[count] = tmpl;
- specs[count++].cmp_type =
+ specs[count++].cmp_type =
(or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
}
if (p2 == 63
|| idesc->operands[1] == IA64_OPND_P2))
{
specs[count] = tmpl;
- specs[count++].cmp_type =
+ specs[count++].cmp_type =
(or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
}
}
}
/* Skip apparent PR write conflicts where both writes are an AND or both
- writes are an OR. */
+ writes are an OR. */
if (rs->dependency->specifier == IA64_RS_PR
|| rs->dependency->specifier == IA64_RS_PR63)
{
continue;
}
if (md.debug_dv)
- fprintf (stderr,
+ fprintf (stderr,
" %s on parallel compare conflict %s vs %s on PR%d\n",
dv_mode[rs->dependency->mode],
- dv_cmp_type[rs->cmp_type],
+ dv_cmp_type[rs->cmp_type],
dv_cmp_type[specs[count].cmp_type],
rs->dependency->specifier == IA64_RS_PR ?
specs[count].index : 63);
-
+
}
/* If either resource is not specific, conservatively assume a conflict
You should have received a copy of the GNU General Public License
along with GAS; see the file COPYING. If not, write to
the Free Software Foundation, 59 Temple Place - Suite 330,
- Boston, MA 02111-1307, USA. */
+ Boston, MA 02111-1307, USA. */
#include <opcode/ia64.h>
#include <elf/ia64.h>
#define DWARF2_LINE_MIN_INSN_LENGTH 1 /* so slot-multipliers can be 1 */
/* This is the information required for unwind records in an ia64
- object file. This is required by GAS and the compiler runtime. */
+ object file. This is required by GAS and the compiler runtime. */
/* These are the starting point masks for the various types of
unwind records. To create a record of type R3 for instance, one
- starts by using the value UNW_R3 and or-ing in any other required values.
- These values are also unique (in context), so they can be used to identify
+ starts by using the value UNW_R3 and or-ing in any other required values.
+ These values are also unique (in context), so they can be used to identify
the various record types as well. UNW_Bx and some UNW_Px do have the
same value, but Px can only occur in a prologue context, and Bx in
a body context. */
pfs_sprel, preds_when, preds_gr, preds_psprel, preds_sprel,
fr_mem, frgr_mem, gr_gr, gr_mem, br_mem, br_gr, spill_base, spill_mask,
unat_when, unat_gr, unat_psprel, unat_sprel, lc_when, lc_gr, lc_psprel,
- lc_sprel, fpsr_when, fpsr_gr, fpsr_psprel, fpsr_sprel,
- priunat_when_gr, priunat_when_mem, priunat_gr, priunat_psprel,
+ lc_sprel, fpsr_when, fpsr_gr, fpsr_psprel, fpsr_sprel,
+ priunat_when_gr, priunat_when_mem, priunat_gr, priunat_psprel,
priunat_sprel, bsp_when, bsp_gr, bsp_psprel, bsp_sprel, bspstore_when,
bspstore_gr, bspstore_psprel, bspstore_sprel, rnat_when, rnat_gr,
rnat_psprel, rnat_sprel, epilogue, label_state, copy_state,
spill_reg_p, unwabi
} unw_record_type;
-
-/* These structures declare the fields that can be used in each of the
+/* These structures declare the fields that can be used in each of the
4 record formats, R, P, B and X. */
typedef struct unw_r_record
unsigned short xy; /* Value of the XY field.. */
} unw_x_record;
-/* This structure is used to determine the specific record type and
+/* This structure is used to determine the specific record type and
its fields. */
typedef struct unwind_record
{
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