winsys/amdgpu: enable computation of tile swizzle
authorMarek Olšák <marek.olsak@amd.com>
Fri, 28 Jul 2017 23:14:09 +0000 (01:14 +0200)
committerMarek Olšák <marek.olsak@amd.com>
Fri, 4 Aug 2017 00:10:04 +0000 (02:10 +0200)
Reviewed-by: Dave Airlie <airlied@redhat.com>
Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com>
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
src/gallium/winsys/amdgpu/drm/amdgpu_winsys.h

index d438b6d662b35c79210b3bbdf8ff015dec6207ff..99e4d778df2e7208f71cde948975f04f22c118d8 100644 (file)
@@ -92,7 +92,17 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
    config.info.levels = tex->last_level + 1;
    config.is_3d = !!(tex->target == PIPE_TEXTURE_3D);
    config.is_cube = !!(tex->target == PIPE_TEXTURE_CUBE);
-   config.info.surf_index = NULL;
+
+   /* Use different surface counters for color and FMASK, so that MSAA MRTs
+    * always use consecutive surface indices when FMASK is allocated between
+    * them.
+    */
+   if (flags & RADEON_SURF_FMASK)
+      config.info.surf_index = &ws->surf_index_fmask;
+   else if (!(flags & RADEON_SURF_Z_OR_SBUFFER))
+      config.info.surf_index = &ws->surf_index_color;
+   else
+      config.info.surf_index = NULL;
 
    return ac_compute_surface(ws->addrlib, &ws->info, &config, mode, surf);
 }
index 7cd2f2048420b0749e77e514acef762060f3e428..7aca612f45234c626955273b0b0bd89481c7f70c 100644 (file)
@@ -57,6 +57,8 @@ struct amdgpu_winsys {
 
    int num_cs; /* The number of command streams created. */
    unsigned num_total_rejected_cs;
+   uint32_t surf_index_color;
+   uint32_t surf_index_fmask;
    uint32_t next_bo_unique_id;
    uint64_t allocated_vram;
    uint64_t allocated_gtt;