cpu: Add HTM ExecContext API

* initiateHtmCmd(Request::Flags flags)
* getHtmTransactionUid()
* newHtmTransactionUid()
* inHtmTransactionalState()
* getHtmTransactionalDepth()

JIRA: https://gem5.atlassian.net/browse/GEM5-587

Change-Id: I438832a3c47fff1d12d0123425985cfa2150ab40
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/30323
Tested-by: kokoro <noreply+kokoro@google.com>

diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index b98cbaa53f1cae19b765b8994f4ab904726bfb39..bab801935d812b29335398c0360b9ae2924a5091 100644 (file)
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -300,6 +300,8 @@ class BaseDynInst : public ExecContext, public RefCounted
     Fault initiateMemRead(Addr addr, unsigned size, Request::Flags flags,
             const std::vector<bool>& byte_enable = std::vector<bool>());
 
+    Fault initiateHtmCmd(Request::Flags flags) override;
+
     Fault writeMem(uint8_t *data, unsigned size, Addr addr,
                    Request::Flags flags, uint64_t *res,
                    const std::vector<bool>& byte_enable = std::vector<bool>());
@@ -539,6 +541,30 @@ class BaseDynInst : public ExecContext, public RefCounted
     bool isFirstMicroop() const { return staticInst->isFirstMicroop(); }
     bool isMicroBranch() const { return staticInst->isMicroBranch(); }
 
+    uint64_t getHtmTransactionUid() const override
+    {
+        panic("Not yet implemented\n");
+        return 0;
+    }
+
+    uint64_t newHtmTransactionUid() const override
+    {
+        panic("Not yet implemented\n");
+        return 0;
+    }
+
+    bool inHtmTransactionalState() const override
+    {
+        panic("Not yet implemented\n");
+        return false;
+    }
+
+    uint64_t getHtmTransactionalDepth() const override
+    {
+        panic("Not yet implemented\n");
+        return 0;
+    }
+
     /** Temporarily sets this instruction as a serialize before instruction. */
     void setSerializeBefore() { status.set(SerializeBefore); }
 
@@ -962,6 +988,14 @@ BaseDynInst<Impl>::initiateMemRead(Addr addr, unsigned size,
             byte_enable);
 }
 
+template<class Impl>
+Fault
+BaseDynInst<Impl>::initiateHtmCmd(Request::Flags flags)
+{
+    panic("Not yet implemented\n");
+    return NoFault;
+}
+
 template<class Impl>
 Fault
 BaseDynInst<Impl>::writeMem(uint8_t *data, unsigned size, Addr addr,

diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index 7d1807e27321f94610037ed030cd2cafb6a23e73..4530d4c0115b214583ca621129a2db33d2caee96 100644 (file)
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -434,6 +434,41 @@ class CheckerCPU : public BaseCPU, public ExecContext
         thread->setMemAccPredicate(val);
     }
 
+    uint64_t
+    getHtmTransactionUid() const override
+    {
+        panic("not yet supported!");
+        return 0;
+    };
+
+    uint64_t
+    newHtmTransactionUid() const override
+    {
+        panic("not yet supported!");
+        return 0;
+    };
+
+    Fault
+    initiateHtmCmd(Request::Flags flags) override
+    {
+        panic("not yet supported!");
+        return NoFault;
+    }
+
+    bool
+    inHtmTransactionalState() const override
+    {
+        panic("not yet supported!");
+        return false;
+    }
+
+    uint64_t
+    getHtmTransactionalDepth() const override
+    {
+        panic("not yet supported!");
+        return 0;
+    }
+
     TheISA::PCState pcState() const override { return thread->pcState(); }
     void
     pcState(const TheISA::PCState &val) override

diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 418019199b92d623d74589747cdb78a6ea3db8e6..cfef3c3c98a7d76708b409ee53a6f80a7ecb4694 100644 (file)
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -252,6 +252,11 @@ class ExecContext {
         panic("ExecContext::initiateMemRead() should be overridden\n");
     }
 
+    /**
+     * Initiate an HTM command,
+     * e.g. tell Ruby we're starting/stopping a transaction
+     */
+    virtual Fault initiateHtmCmd(Request::Flags flags) = 0;
     /**
      * For atomic-mode contexts, perform an atomic memory write operation.
      * For timing-mode contexts, initiate a timing memory write operation.
@@ -320,6 +325,12 @@ class ExecContext {
     virtual bool readMemAccPredicate() const = 0;
     virtual void setMemAccPredicate(bool val) = 0;
 
+    // hardware transactional memory
+    virtual uint64_t newHtmTransactionUid() const = 0;
+    virtual uint64_t getHtmTransactionUid() const = 0;
+    virtual bool inHtmTransactionalState() const = 0;
+    virtual uint64_t getHtmTransactionalDepth() const = 0;
+
     /** @} */
 
     /**

diff --git a/src/cpu/minor/exec_context.hh b/src/cpu/minor/exec_context.hh
index e65fdfb14a0e03d036ae5d5cb19dcecc70faad6e..81675e604c003936ce7b715842d0d806e18f529a 100644 (file)
--- a/src/cpu/minor/exec_context.hh
+++ b/src/cpu/minor/exec_context.hh
@@ -113,6 +113,13 @@ class ExecContext : public ::ExecContext
             size, addr, flags, nullptr, nullptr, byte_enable);
     }
 
+    Fault
+    initiateHtmCmd(Request::Flags flags) override
+    {
+        panic("ExecContext::initiateHtmCmd() not implemented on MinorCPU\n");
+        return NoFault;
+    }
+
     Fault
     writeMem(uint8_t *data, unsigned int size, Addr addr,
              Request::Flags flags, uint64_t *res,
@@ -333,6 +340,39 @@ class ExecContext : public ::ExecContext
         thread.setMemAccPredicate(val);
     }
 
+    // hardware transactional memory
+    uint64_t
+    getHtmTransactionUid() const override
+    {
+        panic("ExecContext::getHtmTransactionUid() not"
+              "implemented on MinorCPU\n");
+        return 0;
+    }
+
+    uint64_t
+    newHtmTransactionUid() const override
+    {
+        panic("ExecContext::newHtmTransactionUid() not"
+              "implemented on MinorCPU\n");
+        return 0;
+    }
+
+    bool
+    inHtmTransactionalState() const override
+    {
+        // ExecContext::inHtmTransactionalState() not
+        // implemented on MinorCPU
+        return false;
+    }
+
+    uint64_t
+    getHtmTransactionalDepth() const override
+    {
+        panic("ExecContext::getHtmTransactionalDepth() not"
+              "implemented on MinorCPU\n");
+        return 0;
+    }
+
     TheISA::PCState
     pcState() const override
     {

diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 5214211ba22d836f7e165729a50119dbb1d7b3e8..41e1d3dd16c246c32d10b1696a59cd85b6b5b71d 100644 (file)
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -473,6 +473,12 @@ class SimpleExecContext : public ExecContext {
         return cpu->initiateMemAMO(addr, size, flags, std::move(amo_op));
     }
 
+    Fault initiateHtmCmd(Request::Flags flags) override
+    {
+        panic("Not yet supported\n");
+        return NoFault;
+    }
+
     /**
      * Sets the number of consecutive store conditional failures.
      */
@@ -527,6 +533,34 @@ class SimpleExecContext : public ExecContext {
         thread->setMemAccPredicate(val);
     }
 
+    uint64_t
+    getHtmTransactionUid() const override
+    {
+        panic("Not yet supported\n");
+        return 0;
+    }
+
+    uint64_t
+    newHtmTransactionUid() const override
+    {
+        panic("Not yet supported\n");
+        return 0;
+    }
+
+    bool
+    inHtmTransactionalState() const override
+    {
+        panic("Not yet supported\n");
+        return false;
+    }
+
+    uint64_t
+    getHtmTransactionalDepth() const override
+    {
+        panic("Not yet supported\n");
+        return 0;
+    }
+
     /**
      * Invalidate a page in the DTLB <i>and</i> ITLB.
      */