Use scc_operand predicate for eq:SI in powerpc.

Oked by David Edelsohn.

From-SVN: r100818

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 13c5668e3bce09ca533d03af7138b249f3c02710..78bd82a8ef3004e532807d0990c4e7b157d09ee8 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2005-06-10  Fariborz Jahanian <fjahanian@apple.com>
+       * rs6000/predicates.md (scc_operand): New.
+       * rs6000/rs6000.md : Use scc_operand for eq:SI compares.
+
 2005-06-10  Dorit Nuzman  <dorit@il.ibm.com>
 
        * tree-vect-analyze.c (vect_analyze_data_ref_dependence): DRs whose

diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index a2daf8711b6184989cab417ffe4c47596e8a0faf..936f9329b5a2fb8f8e4f57196d7fdae078ca7074 100644 (file)
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -132,6 +132,17 @@
   (ior (match_code "const_int")
        (match_operand 0 "gpc_reg_operand")))
 
+;; Return 1 if op is an integer meeting one of 'I','J','O','L'(TARGET_32BIT)
+;; or 'J'(TARGET_64BIT) constraints or if it is a non-special register.
+(define_predicate "scc_operand"
+  (if_then_else (match_code "const_int")
+    (match_test "CONST_OK_FOR_LETTER_P (INTVAL (op), 'I')
+                || CONST_OK_FOR_LETTER_P (INTVAL (op), 'K')
+                || CONST_OK_FOR_LETTER_P (INTVAL (op), 'O')
+                || CONST_OK_FOR_LETTER_P (INTVAL (op), 
+                                          (TARGET_32BIT ? 'L' : 'J'))")
+    (match_operand 0 "gpc_reg_operand")))
+
 ;; Return 1 if op is a 32-bit signed constant integer valid for arithmetic
 ;; or non-special register.
 (define_predicate "reg_or_arith_cint_operand"

diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 2f3331b2c9c3f1faaed97e7209f6ec5ff2bb92e0..ead5f03a3c41be6cbad268142103e8eab992d686 100644 (file)
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -11560,7 +11560,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r")
        (plus:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-                       (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))
+                       (match_operand:SI 2 "scc_operand" "r,O,K,L,I"))
                 (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r")))]
   "TARGET_32BIT"
   "@
@@ -11577,7 +11577,7 @@
        (compare:CC
         (plus:SI
          (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r")
-                (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I,r,O,K,L,I"))
+                (match_operand:SI 2 "scc_operand" "r,O,K,L,I,r,O,K,L,I"))
          (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r"))
         (const_int 0)))
    (clobber (match_scratch:SI 4 "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r"))]
@@ -11601,7 +11601,7 @@
        (compare:CC
         (plus:SI
          (eq:SI (match_operand:SI 1 "gpc_reg_operand" "")
-                (match_operand:SI 2 "reg_or_cint_operand" ""))
+                (match_operand:SI 2 "scc_operand" ""))
          (match_operand:SI 3 "gpc_reg_operand" ""))
         (const_int 0)))
    (clobber (match_scratch:SI 4 ""))]
@@ -11620,7 +11620,7 @@
        (compare:CC
         (plus:SI
          (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r,r,r,r,r,r")
-                (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I,r,O,K,L,I"))
+                (match_operand:SI 2 "scc_operand" "r,O,K,L,I,r,O,K,L,I"))
          (match_operand:SI 3 "gpc_reg_operand" "r,r,r,r,r,r,r,r,r,r"))
         (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "=&r,&r,&r,&r,&r,&r,&r,&r,&r,&r")
@@ -11645,7 +11645,7 @@
        (compare:CC
         (plus:SI
          (eq:SI (match_operand:SI 1 "gpc_reg_operand" "")
-                (match_operand:SI 2 "reg_or_cint_operand" ""))
+                (match_operand:SI 2 "scc_operand" ""))
          (match_operand:SI 3 "gpc_reg_operand" ""))
         (const_int 0)))
    (set (match_operand:SI 0 "gpc_reg_operand" "")
@@ -11661,7 +11661,7 @@
 (define_insn ""
   [(set (match_operand:SI 0 "gpc_reg_operand" "=r,r,r,r,r")
        (neg:SI (eq:SI (match_operand:SI 1 "gpc_reg_operand" "%r,r,r,r,r")
-                      (match_operand:SI 2 "reg_or_cint_operand" "r,O,K,L,I"))))]
+                      (match_operand:SI 2 "scc_operand" "r,O,K,L,I"))))]
   "TARGET_32BIT"
   "@
    xor %0,%1,%2\;{ai|addic} %0,%0,-1\;{sfe|subfe} %0,%0,%0

diff --git a/gcc/testsuite/gcc.dg/const-compare.c b/gcc/testsuite/gcc.dg/const-compare.c
new file mode 100644 (file)
index 0000000..d9c1b77
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/const-compare.c
@@ -0,0 +1,29 @@
+/* { dg-do compile { target *-*-darwin* } } */
+/* { dg-options "-m64 -O1 -static" } */
+typedef unsigned long long uint64_t;
+
+static int
+match(name, pat)
+ uint64_t *name, *pat;
+{
+ int ok=0, negate_range;
+ uint64_t c, k;
+
+  c = *pat++;
+  switch (c & 0xffffffffffULL) {
+  case ((uint64_t)(('[')|0x8000000000ULL)):
+   if ((negate_range = ((*pat & 0xffffffffffULL) == ((uint64_t)(('!')|0x8000000000ULL)) )) != '\0')
+    ++pat;
+   while (((c = *pat++) & 0xffffffffffULL) )
+    if ((*pat & 0xffffffffffULL) == ((uint64_t)(('-')|0x8000000000ULL))) 
+      {
+       pat += 2;
+      } 
+
+   if (ok == negate_range)
+    return(0);
+   break;
+  }
+ return(*name == '\0');
+}
+