Fixed "make test" for git head of iverilog

diff --git a/tests/bram/run-single.sh b/tests/bram/run-single.sh
index 19a235c7a99751f841b1595035f84aa13f753be4..98a45b6132a573fa9353cd753516d9818d4d2e8f 100644 (file)
--- a/tests/bram/run-single.sh
+++ b/tests/bram/run-single.sh
@@ -2,7 +2,7 @@
 set -e
 ../../yosys -qq -p "proc; opt; memory -nomap -bram temp/brams_${2}.txt; opt -fast -full" \
                -l temp/synth_${1}_${2}.log -o temp/synth_${1}_${2}.v temp/brams_${1}.v
-iverilog -Dvcd_file=\"temp/tb_${1}_${2}.vcd\" -DSIMLIB_MEMDELAY=1ns -o temp/tb_${1}_${2}.tb temp/brams_${1}_tb.v \
+iverilog -Dvcd_file=\"temp/tb_${1}_${2}.vcd\" -DSIMLIB_MEMDELAY=1 -o temp/tb_${1}_${2}.tb temp/brams_${1}_tb.v \
                temp/brams_${1}_ref.v temp/synth_${1}_${2}.v temp/brams_${2}.v ../../techlibs/common/simlib.v
 temp/tb_${1}_${2}.tb > temp/tb_${1}_${2}.txt
 if grep -q ERROR temp/tb_${1}_${2}.txt; then