add reset pad to hyperram, should be set externally

diff --git a/lambdasoc/periph/hyperram.py b/lambdasoc/periph/hyperram.py
index cb1a727ca1ebbb5aa056ad2d3fab435b09c98b6c..299a165f85bb7ec17347a4aaacdc26c8258822b3 100644 (file)
--- a/lambdasoc/periph/hyperram.py
+++ b/lambdasoc/periph/hyperram.py
@@ -47,6 +47,7 @@ class HyperRAMASICPhy(Elaboratable):
         self.io = io
         self.ck = ck = Signal()
         self.cs  = cs = Signal()
+        self.rst_n = rst_n = Signal()
 
         self.dq_o  = dq_o  = Signal(8)
         self.dq_i  = dq_i  = Signal(8)
@@ -58,7 +59,7 @@ class HyperRAMASICPhy(Elaboratable):
     def elaborate(self, platform):
         m = Module()
         comb = m.d.comb
-        ck, cs = self.ck, self.cs
+        ck, cs, rst_n = self.ck, self.cs, self.rst_n
         dq_o, dq_i, dq_oe = self.dq_o, self.dq_i, self.dq_oe
         rwds_o, rwds_oe = self.rwds_o, self.rwds_oe
 
@@ -69,6 +70,7 @@ class HyperRAMASICPhy(Elaboratable):
             self.io["ck_o"].eq(ck),
             self.io["ck_oe"].eq(0),
             self.io["rwds_oe"].eq(~rwds_oe),
+            self.io["rst_n"].eq(rst_n),
         ]
 
         for i in range(8):
@@ -90,6 +92,7 @@ class HyperRAMASICPhy(Elaboratable):
 
 class HyperRAMPads:
     def __init__(self, dw=8):
+        self.rst_n = Signal()
         self.ck  = Signal()
         self.cs_n = Signal()
         self.dq   = Record([("oe", 1), ("o", dw),     ("i", dw)])
@@ -103,7 +106,7 @@ class HyperRAMPads:
 
     def ports(self):
         return [self.ck, self.cs, self.dq.o, self.dq.i, self.dq.oe,
-                self.rwds.o, self.rwds.oe]
+                self.rwds.o, self.rwds.oe, self.reset_n]
 
 
 class HyperRAMPHY(Elaboratable):
@@ -111,6 +114,7 @@ class HyperRAMPHY(Elaboratable):
         self.pads = pads
         self.ck = pads.ck
         self.cs = Signal()
+        self.rst_n = pads.rst_n
         self.dq_o = pads.dq.o
         self.dq_i = pads.dq.i
         self.dq_oe = pads.dq.oe
@@ -318,7 +322,8 @@ class HyperRAM(Peripheral, Elaboratable):
 if __name__ == '__main__':
     layout=[('rwds_o', 1), ('rwds_oe', 1),
             ('csn_o', 1), ('csn_oe', 1),
-            ('ck_o', 1), ('ck_oe', 1)]
+            ('ck_o', 1), ('ck_oe', 1),
+            ('rst_n', 1)]
     for i in range(8):
         layout += [('d%d_o' % i, 1), ('d%d_oe' % i, 1), ('d%d_i' % i, 1)]
     io = Record(layout=layout)