r300ContextPtr r300 = R300_CONTEXT(ctx);
BATCH_LOCALS(&r300->radeon);
drm_r300_cmd_header_t cmd;
- uint32_t addr, ndw, i;
+ uint32_t addr, ndw;
if (!r300->radeon.radeonScreen->kernel_mm) {
uint32_t dwords;
}
OUT_BATCH_REGVAL(R300_VAP_PVS_VECTOR_INDX_REG, addr);
OUT_BATCH(CP_PACKET0(R300_VAP_PVS_UPLOAD_DATA, ndw-1) | RADEON_ONE_REG_WR);
- for (i = 0; i < ndw; i++) {
- OUT_BATCH(atom->cmd[i+1]);
- }
+ OUT_BATCH_TABLE(&atom->cmd[1], ndw);
OUT_BATCH_REGVAL(R300_VAP_PVS_STATE_FLUSH_REG, 0);
END_BATCH();
}
r300ContextPtr r300 = R300_CONTEXT(ctx);
BATCH_LOCALS(&r300->radeon);
drm_r300_cmd_header_t cmd;
- uint32_t addr, ndw, i, sz;
+ uint32_t addr, ndw, sz;
int type, clamp, stride;
if (!r300->radeon.radeonScreen->kernel_mm) {
OUT_BATCH(CP_PACKET0(R500_GA_US_VECTOR_INDEX, 0));
OUT_BATCH(addr);
OUT_BATCH(CP_PACKET0(R500_GA_US_VECTOR_DATA, ndw-1) | RADEON_ONE_REG_WR);
- for (i = 0; i < ndw; i++) {
- OUT_BATCH(atom->cmd[i+1]);
- }
+ OUT_BATCH_TABLE(&atom->cmd[1], ndw);
END_BATCH();
}
}
*/
#define OUT_BATCH_TABLE(ptr,n) \
do { \
- int _i; \
- for (_i=0; _i < n; _i++) {\
- radeon_cs_write_dword(b_l_rmesa->cmdbuf.cs, ptr[_i]);\
- }\
+ radeon_cs_write_table(b_l_rmesa->cmdbuf.cs, ptr, n); \
} while(0)
/**