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cpu: Use the generic nop static inst instead of decoding the arch version.
author
Gabe Black
<gabeblack@google.com>
Wed, 20 Dec 2017 07:48:00 +0000
(23:48 -0800)
committer
Gabe Black
<gabeblack@google.com>
Fri, 22 Dec 2017 00:27:37 +0000
(
00:27
+0000)
This removes a dependence on the ISA.
Change-Id: I01013bc70558f0831327213912bcac11258066a6
Reviewed-on: https://gem5-review.googlesource.com/6824
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
src/cpu/o3/fetch_impl.hh
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diff --git
a/src/cpu/o3/fetch_impl.hh
b/src/cpu/o3/fetch_impl.hh
index 7631b4c6ad07a36bb5144da98193b901bb6ee2fb..0cf8a47a7ff3f953e5e0f3795d7bf2d15552ee94 100644
(file)
--- a/
src/cpu/o3/fetch_impl.hh
+++ b/
src/cpu/o3/fetch_impl.hh
@@
-727,9
+727,8
@@
DefaultFetch<Impl>::finishTranslation(const Fault &fault, RequestPtr mem_req)
DPRINTF(Fetch, "[tid:%i]: Translation faulted, building noop.\n", tid);
// We will use a nop in ordier to carry the fault.
- DynInstPtr instruction = buildInst(tid,
- decoder[tid]->decode(TheISA::NoopMachInst, fetchPC.instAddr()),
- NULL, fetchPC, fetchPC, false);
+ DynInstPtr instruction = buildInst(tid, StaticInst::nopStaticInstPtr,
+ NULL, fetchPC, fetchPC, false);
instruction->setPredTarg(fetchPC);
instruction->fault = fault;