ALLOC_STATE( tex.unknown4, variable, mtu+1, "tex_unknown4", 0 );
r300->hw.tex.unknown4.cmd[R300_TEX_CMD_0] = cmducs(R300_TX_UNK4_0, 0);
- ALLOC_STATE( tex.unknown5, variable, mtu+1, "tex_unknown5", 0 );
- r300->hw.tex.unknown5.cmd[R300_TEX_CMD_0] = cmducs(R300_TX_UNK5_0, 0);
-
- //ALLOC_STATE( tex.border_color, variable, mtu+1, "tex_border_color", 0 );
- // r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = cmducs(R300_TX_BORDER_COLOR_0, 0);
+ ALLOC_STATE( tex.border_color, variable, mtu+1, "tex_border_color", 0 );
+ r300->hw.tex.border_color.cmd[R300_TEX_CMD_0] = cmducs(R300_TX_BORDER_COLOR_0, 0);
/* Setup the atom linked list */
insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.format);
insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.offset);
insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.unknown4);
- insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.unknown5);
- //insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.border_color);
+ insert_at_tail(&r300->hw.atomlist, &r300->hw.tex.border_color);
r300->hw.is_dirty = GL_TRUE;
r300->hw.all_dirty = GL_TRUE;
struct r300_state_atom format;
struct r300_state_atom offset;
struct r300_state_atom unknown4;
- struct r300_state_atom unknown5;
- //struct r300_state_atom border_color;
+ struct r300_state_atom border_color;
} tex;
struct r300_state_atom txe; /* tex enable (4104) */
};
# define R300_TXO_OFFSET_SHIFT 5
/* END */
#define R300_TX_UNK4_0 0x4580
-#define R300_TX_UNK5_0 0x45C0
-#define R300_TX_BORDER_COLOR_0 0x45F0 //ff00ff00 == { 0, 1.0, 0, 1.0 }
+#define R300_TX_BORDER_COLOR_0 0x45C0 //ff00ff00 == { 0, 1.0, 0, 1.0 }
/* END */
R300_STATECHANGE(r300, tex.format);
R300_STATECHANGE(r300, tex.offset);
R300_STATECHANGE(r300, tex.unknown4);
- R300_STATECHANGE(r300, tex.unknown5);
- //R300_STATECHANGE(r300, tex.border_color);
+ R300_STATECHANGE(r300, tex.border_color);
r300->state.texture.tc_count=0;
//fprintf(stderr, "t->format=%08x\n", t->format);
r300->hw.tex.offset.cmd[R300_TEX_VALUE_0+i]=r300->radeon.radeonScreen->fbLocation+t->offset;
r300->hw.tex.unknown4.cmd[R300_TEX_VALUE_0+i]=0x0;
- r300->hw.tex.unknown5.cmd[R300_TEX_VALUE_0+i]=0x0;
- //r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
+ r300->hw.tex.border_color.cmd[R300_TEX_VALUE_0+i]=t->pp_border_color;
}
}
((drm_r300_cmd_header_t*)r300->hw.tex.filter.cmd)->unchecked_state.count = max_texture_unit+1;
((drm_r300_cmd_header_t*)r300->hw.tex.format.cmd)->unchecked_state.count = max_texture_unit+1;
((drm_r300_cmd_header_t*)r300->hw.tex.offset.cmd)->unchecked_state.count = max_texture_unit+1;
((drm_r300_cmd_header_t*)r300->hw.tex.unknown4.cmd)->unchecked_state.count = max_texture_unit+1;
- ((drm_r300_cmd_header_t*)r300->hw.tex.unknown5.cmd)->unchecked_state.count = max_texture_unit+1;
- //((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
+ ((drm_r300_cmd_header_t*)r300->hw.tex.border_color.cmd)->unchecked_state.count = max_texture_unit+1;
if (RADEON_DEBUG & DEBUG_STATE)
fprintf(stderr, "TX_ENABLE: %08x max_texture_unit=%d\n", r300->hw.txe.cmd[R300_TXE_ENABLE], max_texture_unit);
static void r300SetTexBorderColor(r300TexObjPtr t, GLubyte c[4])
{
- t->pp_border_color = radeonPackColor(4, c[0], c[1], c[2], c[3]);
+ t->pp_border_color = radeonPackColor(4, c[3], c[2], c[1], c[0]);
}
/**