[arm] Fix gcc.target/arm/negdi-[12].c

These tests are failing for a silly reason. They scan for an occurrence of the NEGS instruction.
NEGS (and NEG in general) is a pre-UAL alias of RSB with an immediate of 0 and we only emit it
in one pattern: *thumb2_negsi2_short in thumb2.md. In all other instances of negation we emit
the modern RSB mnemonic. This causes needless differences in assembly output.
For example, for these testcases we emit NEG when compiling for -march=armv7-a, but for armv7ve
we emit RSB, causing the scan-assembler tests to fail.

This patch updates the *thumb2_negsi2_short pattern to use the RSB mnemonic and
fixes the flaky scan-assembler directives.

These tests now pass for my compiler configured with:
--with-cpu=cortex-a15 --with-fpu=neon-vfpv4 --with-float=hard --with-mode=thumb

Bootstrapped and tested on arm-none-linux-gnueabihf as well.

	* config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
	instead of NEG.

	* gcc.target/arm/negdi-1.c: Remove bogus assembler scan for negs.
	* gcc.target/arm/negdi-2.c: Likewise.
	* gcc.target/arm/thumb-16bit-ops.c: Replace scan for NEGS with RSBS.
--This line,gand those below, will be ignored--

M    gcc/config/arm/thumb2.md
M    gcc/ChangeLog
M    gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
M    gcc/testsuite/gcc.target/arm/negdi-1.c
M    gcc/testsuite/gcc.target/arm/negdi-2.c
M    gcc/testsuite/ChangeLog

From-SVN: r256881

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 4a52a308e101b37d58e74e7413f6c4fc290c67c5..5feefb2dda8adad19fef52bea9796fb2f29f7dc7 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/arm/thumb2.md (*thumb2_negsi2_short): Use RSB mnemonic
+       instead of NEG.
+
 2018-01-18  Jakub Jelinek  <jakub@redhat.com>
 
        PR sanitizer/81715

diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md
index e2e2298957a4b1790008a59d5e6cf9092ad2b00f..8eb20003ab2f6df847d9344ea78e0175ce6dd902 100644 (file)
--- a/gcc/config/arm/thumb2.md
+++ b/gcc/config/arm/thumb2.md
@@ -1420,7 +1420,7 @@
        (neg:SI (match_operand:SI 1 "low_register_operand" "l")))
    (clobber (reg:CC CC_REGNUM))]
   "TARGET_THUMB2 && reload_completed"
-  "neg%!\t%0, %1"
+  "rsb%!\t%0, %1, #0"
   [(set_attr "predicable" "yes")
    (set_attr "length" "2")
    (set_attr "type" "alu_sreg")]

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index a0000cd70ad47365f2d9a0c3706fe45e96395f27..ef525655391d712e630b2df49308bc3408753b8d 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,9 @@
+2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * gcc.target/arm/negdi-1.c: Remove bogus assembler scan for negs.
+       * gcc.target/arm/negdi-2.c: Likewise.
+       * gcc.target/arm/thumb-16bit-ops.c: Replace scan for NEGS with RSBS.
+
 2018-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
 
        * gcc.target/arm/pr40956.c: Adjust scan-assembler pattern.

diff --git a/gcc/testsuite/gcc.target/arm/negdi-1.c b/gcc/testsuite/gcc.target/arm/negdi-1.c
index c9bef049c4a467288e90c96abe1a34e2d1e028fc..efa49ad62800378ba3ee810931680c159479c7b9 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/negdi-1.c
+++ b/gcc/testsuite/gcc.target/arm/negdi-1.c
@@ -12,6 +12,5 @@ Expected output:
        rsb     r0, r0, #0
        mov     r1, r0, asr #31
 */
-/* { dg-final { scan-assembler-times "rsb" 1 { target { arm_nothumb } } } } */
-/* { dg-final { scan-assembler-times "negs\\t" 1 { target { ! { arm_nothumb } } } } } */
+/* { dg-final { scan-assembler-times "rsbs?\\t...?, ...?, #0" 1 } } */
 /* { dg-final { scan-assembler-times "asr" 1 } } */

diff --git a/gcc/testsuite/gcc.target/arm/negdi-2.c b/gcc/testsuite/gcc.target/arm/negdi-2.c
index 4444c20ea9c010e7f5de67a953730efa680146b3..38dffeddd54c14d64c39b35992bbb7225efbeb7f 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/negdi-2.c
+++ b/gcc/testsuite/gcc.target/arm/negdi-2.c
@@ -11,6 +11,5 @@ Expected output:
        rsb     r0, r0, #0
        mov     r1, #0
 */
-/* { dg-final { scan-assembler-times "rsb\\t...?, ...?, #0" 1 { target { arm_nothumb } } } } */
-/* { dg-final { scan-assembler-times "negs\\t...?, ...?" 1 { target { ! arm_nothumb } } } } */
+/* { dg-final { scan-assembler-times "rsbs?\\t...?, ...?, #0" 1 } } */
 /* { dg-final { scan-assembler-times "mov" 1 } } */

diff --git a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
index 90407eb6872efe9c545c5945de17a2eead91eead..9f4f659b35c062c9c576e9bb2d6aae74f91f6a86 100644 (file)
--- a/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
+++ b/gcc/testsuite/gcc.target/arm/thumb-16bit-ops.c
@@ -200,4 +200,4 @@ s (int a, int b)
   return -b;
 }
 
-/* { dg-final { scan-assembler "negs   r0, r1" } } */
+/* { dg-final { scan-assembler "rsbs   r0, r1, #0" } } */