gas/

2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10775
	* doc/c-i386.texi: Mention movabs.

gas/testsuite/

2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10775
	* gas/i386/immed64.d: Updated.
	* gas/i386/l1om.d: Likewise.
	* gas/i386/x86-64-disp-intel.d: Likewise.
	* gas/i386/x86-64-disp.d: Likewise.
	* gas/i386/x86_64.d: Likewise.

opcodes/

2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>

	PR gas/10775
	* i386-dis.c: Document LB, LS and LV macros.
	(dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
	with the 64-bit displacement or immediate operand.
	(putop): Handle LB, LS and LV macros.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f4f37506f37699f833cb20f53eddd658cd213e60..e2b7e86b32c313f87ac4a58ac219650e6c03f30e 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/10775
+       * doc/c-i386.texi: Mention movabs.
+
 2009-10-19  H.J. Lu  <hongjiu.lu@intel.com>
 
        * doc/c-i386.texi: Don't mention the 8 extra control registers

diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 80760a22393b56aa68989b0c0e989dabc0f6a448..411067975bf283bd6131a6aa1c77b0a55e07cb30 100644 (file)
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -309,6 +309,9 @@ this by prefixing memory operands (@emph{not} the instruction mnemonics) with
 Intel @samp{mov al, byte ptr @var{foo}} is @samp{movb @var{foo}, %al} in AT&T
 syntax.
 
+In 64-bit code, @samp{movabs} can be used to encode the @samp{mov}
+instruction with the 64-bit displacement or immediate operand.
+
 @cindex return instructions, i386
 @cindex i386 jump, call, return
 @cindex return instructions, x86-64

diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2c8da327ca87adf713dd17d9348a41035a88e099..b363b7a57beac32dbbeb7f617c4a4ff09c221f22 100644 (file)
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,12 @@
+2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/10775
+       * gas/i386/immed64.d: Updated.
+       * gas/i386/l1om.d: Likewise.
+       * gas/i386/x86-64-disp-intel.d: Likewise.
+       * gas/i386/x86-64-disp.d: Likewise.
+       * gas/i386/x86_64.d: Likewise.
+
 2009-10-19  Doug Evans  <dje@sebabeach.org>
 
        * gas/xc16x/shlrol.s: Specify constant shift amount.

diff --git a/gas/testsuite/gas/i386/immed64.d b/gas/testsuite/gas/i386/immed64.d
index 667680675a58d95bfef333adee5dde71678ca118..e195ffd53cf2252f213fc25b60fbb454e9c29c5d 100644 (file)
--- a/gas/testsuite/gas/i386/immed64.d
+++ b/gas/testsuite/gas/i386/immed64.d
@@ -21,9 +21,9 @@ Disassembly of section \.text:
 [      ]*[0-9a-fA-F]+:[        ]+b8 04 00 00 00[       ]+movl? +\$0x4,%eax
 [      ]*[0-9a-fA-F]+:[        ]+b8 08 00 00 00[       ]+movl? +\$0x8,%eax
 [      ]*[0-9a-fA-F]+:[        ]+b8 00 00 00 00[       ]+movl? +\$0x0,%eax
-[      ]*[0-9a-fA-F]+:[        ]+48 b8 04 00 00 00 00 00 00 00[        ]+movq? +\$0x4,%rax
-[      ]*[0-9a-fA-F]+:[        ]+48 b8 08 00 00 00 00 00 00 00[        ]+movq? +\$0x8,%rax
-[      ]*[0-9a-fA-F]+:[        ]+48 b8 00 00 00 00 00 00 00 00[        ]+movq? +\$0x0,%rax
+[      ]*[0-9a-fA-F]+:[        ]+48 b8 04 00 00 00 00 00 00 00[        ]+movabsq? +\$0x4,%rax
+[      ]*[0-9a-fA-F]+:[        ]+48 b8 08 00 00 00 00 00 00 00[        ]+movabsq? +\$0x8,%rax
+[      ]*[0-9a-fA-F]+:[        ]+48 b8 00 00 00 00 00 00 00 00[        ]+movabsq? +\$0x0,%rax
 [      ]*[0-9a-fA-F]+:[        ]+04 04[        ]+addb? +\$0x4,%al
 [      ]*[0-9a-fA-F]+:[        ]+04 08[        ]+addb? +\$0x8,%al
 [      ]*[0-9a-fA-F]+:[        ]+04 00[        ]+addb? +\$0x0,%al

diff --git a/gas/testsuite/gas/i386/l1om.d b/gas/testsuite/gas/i386/l1om.d
index fae038cbcce79273110b2b804a15ef2cb38ced73..1b73fb8464619ea6a0e5c8f5c63dd10c151ba27d 100644 (file)
--- a/gas/testsuite/gas/i386/l1om.d
+++ b/gas/testsuite/gas/i386/l1om.d
@@ -47,8 +47,8 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    41 b4 11                mov    \$0x11,%r12b
 [      ]*[a-f0-9]+:    b8 44 33 22 11          mov    \$0x11223344,%eax
 [      ]*[a-f0-9]+:    41 b8 44 33 22 11       mov    \$0x11223344,%r8d
-[      ]*[a-f0-9]+:    48 b8 88 77 66 55 44 33 22 11   mov    \$0x1122334455667788,%rax
-[      ]*[a-f0-9]+:    49 b8 88 77 66 55 44 33 22 11   mov    \$0x1122334455667788,%r8
+[      ]*[a-f0-9]+:    48 b8 88 77 66 55 44 33 22 11   movabs \$0x1122334455667788,%rax
+[      ]*[a-f0-9]+:    49 b8 88 77 66 55 44 33 22 11   movabs \$0x1122334455667788,%r8
 [      ]*[a-f0-9]+:    03 00                   add    \(%rax\),%eax
 [      ]*[a-f0-9]+:    41 03 00                add    \(%r8\),%eax
 [      ]*[a-f0-9]+:    45 03 00                add    \(%r8\),%r8d
@@ -94,12 +94,12 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    83 80 22 22 22 22 33    addl   \$0x33,0x22222222\(%rax\)
 [      ]*[a-f0-9]+:    41 83 04 e8 33          addl   \$0x33,\(%r8,%rbp,8\)
 [      ]*[a-f0-9]+:    83 04 25 22 22 22 22 33         addl   \$0x33,0x22222222
-[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%al
-[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%eax
-[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      mov    %al,0x8877665544332211
-[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      mov    %eax,0x8877665544332211
-[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%rax
-[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   mov    %rax,0x8877665544332211
+[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%al
+[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%eax
+[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      movabs %al,0x8877665544332211
+[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      movabs %eax,0x8877665544332211
+[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%rax
+[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   movabs %rax,0x8877665544332211
 [      ]*[a-f0-9]+:    48 99                   cqto   
 [      ]*[a-f0-9]+:    48 98                   cltq   
 [      ]*[a-f0-9]+:    48 63 c0                movslq %eax,%rax
@@ -111,7 +111,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 b8 00 00             mov    \$0x0,%ax
 [      ]*[a-f0-9]+:    b8 00 00 00 00          mov    \$0x0,%eax
 [      ]*[a-f0-9]+:    48 c7 c0 00 00 00 00    mov    \$0x0,%rax
-[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      mov    0x0,%eax
+[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      movabs 0x0,%eax
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 00    mov    0x0,%eax
 [      ]*[a-f0-9]+:    8b 80 00 00 00 00       mov    0x0\(%rax\),%eax
 [      ]*[a-f0-9]+:    8b 05 00 00 00 00       mov    0x0\(%rip\),%eax        # 1d5 <bar\+0x2e>
@@ -119,28 +119,28 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 b8 00 00             mov    \$0x0,%ax
 [      ]*[a-f0-9]+:    b8 00 00 00 00          mov    \$0x0,%eax
 [      ]*[a-f0-9]+:    48 c7 c0 00 00 00 00    mov    \$0x0,%rax
-[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      mov    0x0,%eax
+[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      movabs 0x0,%eax
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 00    mov    0x0,%eax
 [      ]*[a-f0-9]+:    8b 80 00 00 00 00       mov    0x0\(%rax\),%eax
 [      ]*[a-f0-9]+:    8b 05 00 00 00 00       mov    0x0\(%rip\),%eax        # 203 <foo>
 
 0+203 <foo>:
-[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%al
-[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%ax
-[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%eax
-[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%rax
-[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      mov    %al,0x8877665544332211
-[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   mov    %ax,0x8877665544332211
-[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      mov    %eax,0x8877665544332211
-[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   mov    %rax,0x8877665544332211
-[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%al
-[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%ax
-[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%eax
-[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%rax
-[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      mov    %al,0x8877665544332211
-[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   mov    %ax,0x8877665544332211
-[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      mov    %eax,0x8877665544332211
-[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   mov    %rax,0x8877665544332211
+[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%al
+[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%ax
+[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%eax
+[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%rax
+[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      movabs %al,0x8877665544332211
+[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   movabs %ax,0x8877665544332211
+[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      movabs %eax,0x8877665544332211
+[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   movabs %rax,0x8877665544332211
+[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%al
+[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%ax
+[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%eax
+[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%rax
+[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      movabs %al,0x8877665544332211
+[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   movabs %ax,0x8877665544332211
+[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      movabs %eax,0x8877665544332211
+[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   movabs %rax,0x8877665544332211
 [      ]*[a-f0-9]+:    8a 04 25 11 22 33 ff    mov    0xffffffffff332211,%al
 [      ]*[a-f0-9]+:    66 8b 04 25 11 22 33 ff         mov    0xffffffffff332211,%ax
 [      ]*[a-f0-9]+:    8b 04 25 11 22 33 ff    mov    0xffffffffff332211,%eax

diff --git a/gas/testsuite/gas/i386/x86-64-disp-intel.d b/gas/testsuite/gas/i386/x86-64-disp-intel.d
index 03ab1cbe540721d0ec81c27b6679fd8716067541..047d87fa692062b169319829fd90dbc2aae63fb2 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-disp-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-disp-intel.d
@@ -16,7 +16,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 80    mov    eax,DWORD PTR ds:0xffffffff80000000
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 80    mov    eax,DWORD PTR ds:0xffffffff80000000
 [      ]*[a-f0-9]+:    8b 04 25 ff ff ff 7f    mov    eax,DWORD PTR ds:0x7fffffff
-[      ]*[a-f0-9]+:    a1 00 00 00 80 00 00 00 00      mov    eax,ds:0x80000000
+[      ]*[a-f0-9]+:    a1 00 00 00 80 00 00 00 00      movabs eax,ds:0x80000000
 [      ]*[a-f0-9]+:    b8 f0 00 e0 0e          mov    eax,0xee000f0
 [      ]*[a-f0-9]+:    89 98 f0 00 e0 0e       mov    DWORD PTR \[rax\+0xee000f0\],ebx
 [      ]*[a-f0-9]+:    89 98 f0 00 e0 0e       mov    DWORD PTR \[rax\+0xee000f0\],ebx
@@ -26,15 +26,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    65 89 1c 25 f0 00 e0 0e         mov    DWORD PTR gs:0xee000f0,ebx
 [      ]*[a-f0-9]+:    89 04 25 f0 00 e0 0e    mov    DWORD PTR ds:0xee000f0,eax
 [      ]*[a-f0-9]+:    65 89 04 25 f0 00 e0 0e         mov    DWORD PTR gs:0xee000f0,eax
-[      ]*[a-f0-9]+:    a3 f0 00 e0 fe 00 00 00 00      mov    ds:0xfee000f0,eax
-[      ]*[a-f0-9]+:    65 a3 f0 00 e0 fe 00 00 00 00   mov    gs:0xfee000f0,eax
+[      ]*[a-f0-9]+:    a3 f0 00 e0 fe 00 00 00 00      movabs ds:0xfee000f0,eax
+[      ]*[a-f0-9]+:    65 a3 f0 00 e0 fe 00 00 00 00   movabs gs:0xfee000f0,eax
 [      ]*[a-f0-9]+:    65 8b 1c 25 f0 00 e0 0e         mov    ebx,DWORD PTR gs:0xee000f0
 [      ]*[a-f0-9]+:    8b 1c 25 f0 00 e0 0e    mov    ebx,DWORD PTR ds:0xee000f0
 [      ]*[a-f0-9]+:    8b 1c 25 f0 00 e0 0e    mov    ebx,DWORD PTR ds:0xee000f0
 [      ]*[a-f0-9]+:    65 8b 04 25 f0 00 e0 0e         mov    eax,DWORD PTR gs:0xee000f0
 [      ]*[a-f0-9]+:    8b 04 25 f0 00 e0 0e    mov    eax,DWORD PTR ds:0xee000f0
 [      ]*[a-f0-9]+:    8b 04 25 f0 00 e0 0e    mov    eax,DWORD PTR ds:0xee000f0
-[      ]*[a-f0-9]+:    65 a1 f0 00 e0 fe 00 00 00 00   mov    eax,gs:0xfee000f0
-[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      mov    eax,ds:0xfee000f0
-[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      mov    eax,ds:0xfee000f0
+[      ]*[a-f0-9]+:    65 a1 f0 00 e0 fe 00 00 00 00   movabs eax,gs:0xfee000f0
+[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      movabs eax,ds:0xfee000f0
+[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      movabs eax,ds:0xfee000f0
 #pass

diff --git a/gas/testsuite/gas/i386/x86-64-disp.d b/gas/testsuite/gas/i386/x86-64-disp.d
index 19e720e9bf4e58dee9b49cf799dfe535f12e76b1..e8c321014289ff88be5d248ed01c5ea367663d40 100644 (file)
--- a/gas/testsuite/gas/i386/x86-64-disp.d
+++ b/gas/testsuite/gas/i386/x86-64-disp.d
@@ -15,7 +15,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 80    mov    0xffffffff80000000,%eax
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 80    mov    0xffffffff80000000,%eax
 [      ]*[a-f0-9]+:    8b 04 25 ff ff ff 7f    mov    0x7fffffff,%eax
-[      ]*[a-f0-9]+:    a1 00 00 00 80 00 00 00 00      mov    0x80000000,%eax
+[      ]*[a-f0-9]+:    a1 00 00 00 80 00 00 00 00      movabs 0x80000000,%eax
 [      ]*[a-f0-9]+:    b8 f0 00 e0 0e          mov    \$0xee000f0,%eax
 [      ]*[a-f0-9]+:    89 98 f0 00 e0 0e       mov    %ebx,0xee000f0\(%rax\)
 [      ]*[a-f0-9]+:    89 98 f0 00 e0 0e       mov    %ebx,0xee000f0\(%rax\)
@@ -25,15 +25,15 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    65 89 1c 25 f0 00 e0 0e         mov    %ebx,%gs:0xee000f0
 [      ]*[a-f0-9]+:    89 04 25 f0 00 e0 0e    mov    %eax,0xee000f0
 [      ]*[a-f0-9]+:    65 89 04 25 f0 00 e0 0e         mov    %eax,%gs:0xee000f0
-[      ]*[a-f0-9]+:    a3 f0 00 e0 fe 00 00 00 00      mov    %eax,0xfee000f0
-[      ]*[a-f0-9]+:    65 a3 f0 00 e0 fe 00 00 00 00   mov    %eax,%gs:0xfee000f0
+[      ]*[a-f0-9]+:    a3 f0 00 e0 fe 00 00 00 00      movabs %eax,0xfee000f0
+[      ]*[a-f0-9]+:    65 a3 f0 00 e0 fe 00 00 00 00   movabs %eax,%gs:0xfee000f0
 [      ]*[a-f0-9]+:    65 8b 1c 25 f0 00 e0 0e         mov    %gs:0xee000f0,%ebx
 [      ]*[a-f0-9]+:    8b 1c 25 f0 00 e0 0e    mov    0xee000f0,%ebx
 [      ]*[a-f0-9]+:    8b 1c 25 f0 00 e0 0e    mov    0xee000f0,%ebx
 [      ]*[a-f0-9]+:    65 8b 04 25 f0 00 e0 0e         mov    %gs:0xee000f0,%eax
 [      ]*[a-f0-9]+:    8b 04 25 f0 00 e0 0e    mov    0xee000f0,%eax
 [      ]*[a-f0-9]+:    8b 04 25 f0 00 e0 0e    mov    0xee000f0,%eax
-[      ]*[a-f0-9]+:    65 a1 f0 00 e0 fe 00 00 00 00   mov    %gs:0xfee000f0,%eax
-[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      mov    0xfee000f0,%eax
-[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      mov    0xfee000f0,%eax
+[      ]*[a-f0-9]+:    65 a1 f0 00 e0 fe 00 00 00 00   movabs %gs:0xfee000f0,%eax
+[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      movabs 0xfee000f0,%eax
+[      ]*[a-f0-9]+:    a1 f0 00 e0 fe 00 00 00 00      movabs 0xfee000f0,%eax
 #pass

diff --git a/gas/testsuite/gas/i386/x86_64.d b/gas/testsuite/gas/i386/x86_64.d
index 086cc3ace42421fa6f48036118d1189837acdf8f..6fed19bfda65ad4410116b758c676567ea81e202 100644 (file)
--- a/gas/testsuite/gas/i386/x86_64.d
+++ b/gas/testsuite/gas/i386/x86_64.d
@@ -45,8 +45,8 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    41 b4 11                mov    \$0x11,%r12b
 [      ]*[a-f0-9]+:    b8 44 33 22 11          mov    \$0x11223344,%eax
 [      ]*[a-f0-9]+:    41 b8 44 33 22 11       mov    \$0x11223344,%r8d
-[      ]*[a-f0-9]+:    48 b8 88 77 66 55 44 33 22 11   mov    \$0x1122334455667788,%rax
-[      ]*[a-f0-9]+:    49 b8 88 77 66 55 44 33 22 11   mov    \$0x1122334455667788,%r8
+[      ]*[a-f0-9]+:    48 b8 88 77 66 55 44 33 22 11   movabs \$0x1122334455667788,%rax
+[      ]*[a-f0-9]+:    49 b8 88 77 66 55 44 33 22 11   movabs \$0x1122334455667788,%r8
 [      ]*[a-f0-9]+:    03 00                   add    \(%rax\),%eax
 [      ]*[a-f0-9]+:    41 03 00                add    \(%r8\),%eax
 [      ]*[a-f0-9]+:    45 03 00                add    \(%r8\),%r8d
@@ -92,12 +92,12 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    83 80 22 22 22 22 33    addl   \$0x33,0x22222222\(%rax\)
 [      ]*[a-f0-9]+:    41 83 04 e8 33          addl   \$0x33,\(%r8,%rbp,8\)
 [      ]*[a-f0-9]+:    83 04 25 22 22 22 22 33         addl   \$0x33,0x22222222
-[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%al
-[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%eax
-[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      mov    %al,0x8877665544332211
-[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      mov    %eax,0x8877665544332211
-[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%rax
-[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   mov    %rax,0x8877665544332211
+[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%al
+[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%eax
+[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      movabs %al,0x8877665544332211
+[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      movabs %eax,0x8877665544332211
+[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%rax
+[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   movabs %rax,0x8877665544332211
 [      ]*[a-f0-9]+:    48 99                   cqto   
 [      ]*[a-f0-9]+:    48 98                   cltq   
 [      ]*[a-f0-9]+:    48 63 c0                movslq %eax,%rax
@@ -109,7 +109,7 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 b8 00 00             mov    \$0x0,%ax
 [      ]*[a-f0-9]+:    b8 00 00 00 00          mov    \$0x0,%eax
 [      ]*[a-f0-9]+:    48 c7 c0 00 00 00 00    mov    \$0x0,%rax
-[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      mov    0x0,%eax
+[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      movabs 0x0,%eax
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 00    mov    0x0,%eax
 [      ]*[a-f0-9]+:    8b 80 00 00 00 00       mov    0x0\(%rax\),%eax
 [      ]*[a-f0-9]+:    8b 05 00 00 00 00       mov    0x0\(%rip\),%eax        # 1d5 <bar\+0x2e>
@@ -117,28 +117,28 @@ Disassembly of section .text:
 [      ]*[a-f0-9]+:    66 b8 00 00             mov    \$0x0,%ax
 [      ]*[a-f0-9]+:    b8 00 00 00 00          mov    \$0x0,%eax
 [      ]*[a-f0-9]+:    48 c7 c0 00 00 00 00    mov    \$0x0,%rax
-[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      mov    0x0,%eax
+[      ]*[a-f0-9]+:    a1 00 00 00 00 00 00 00 00      movabs 0x0,%eax
 [      ]*[a-f0-9]+:    8b 04 25 00 00 00 00    mov    0x0,%eax
 [      ]*[a-f0-9]+:    8b 80 00 00 00 00       mov    0x0\(%rax\),%eax
 [      ]*[a-f0-9]+:    8b 05 00 00 00 00       mov    0x0\(%rip\),%eax        # 203 <foo>
 
 0+203 <foo>:
-[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%al
-[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%ax
-[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%eax
-[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%rax
-[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      mov    %al,0x8877665544332211
-[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   mov    %ax,0x8877665544332211
-[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      mov    %eax,0x8877665544332211
-[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   mov    %rax,0x8877665544332211
-[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%al
-[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%ax
-[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      mov    0x8877665544332211,%eax
-[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   mov    0x8877665544332211,%rax
-[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      mov    %al,0x8877665544332211
-[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   mov    %ax,0x8877665544332211
-[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      mov    %eax,0x8877665544332211
-[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   mov    %rax,0x8877665544332211
+[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%al
+[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%ax
+[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%eax
+[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%rax
+[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      movabs %al,0x8877665544332211
+[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   movabs %ax,0x8877665544332211
+[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      movabs %eax,0x8877665544332211
+[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   movabs %rax,0x8877665544332211
+[      ]*[a-f0-9]+:    a0 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%al
+[      ]*[a-f0-9]+:    66 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%ax
+[      ]*[a-f0-9]+:    a1 11 22 33 44 55 66 77 88      movabs 0x8877665544332211,%eax
+[      ]*[a-f0-9]+:    48 a1 11 22 33 44 55 66 77 88   movabs 0x8877665544332211,%rax
+[      ]*[a-f0-9]+:    a2 11 22 33 44 55 66 77 88      movabs %al,0x8877665544332211
+[      ]*[a-f0-9]+:    66 a3 11 22 33 44 55 66 77 88   movabs %ax,0x8877665544332211
+[      ]*[a-f0-9]+:    a3 11 22 33 44 55 66 77 88      movabs %eax,0x8877665544332211
+[      ]*[a-f0-9]+:    48 a3 11 22 33 44 55 66 77 88   movabs %rax,0x8877665544332211
 [      ]*[a-f0-9]+:    8a 04 25 11 22 33 ff    mov    0xffffffffff332211,%al
 [      ]*[a-f0-9]+:    66 8b 04 25 11 22 33 ff         mov    0xffffffffff332211,%ax
 [      ]*[a-f0-9]+:    8b 04 25 11 22 33 ff    mov    0xffffffffff332211,%eax

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index d01f0fcc4b7d9758691f965d494b67f94ed365d8..cd673ba1f8aeb4e6e0ac4143deb84d8d907eee2c 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2009-10-20  H.J. Lu  <hongjiu.lu@intel.com>
+
+       PR gas/10775
+       * i386-dis.c: Document LB, LS and LV macros.
+       (dis386): Use mov%LB, mov%LS and mov%LV on mov instruction
+       with the 64-bit displacement or immediate operand.
+       (putop): Handle LB, LS and LV macros.
+
 2009-10-18  Doug Evans  <dje@sebabeach.org>
 
        * lm32-opinst.c: Regenerate.

diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index b30febc8bb75754830b41da369ebdc5484e2caac..8a748636343d12611531d777cc7647c6465a3e37 100644 (file)
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1334,9 +1334,12 @@ struct dis386 {
    2 upper case letter macros:
    "XY" => print 'x' or 'y' if no register operands or suffix_always
           is true.
-   'XW' => print 's', 'd' depending on the VEX.W bit (for FMA)
-   'LQ' => print 'l' ('d' in Intel mode) or 'q' for memory operand
+   "XW" => print 's', 'd' depending on the VEX.W bit (for FMA)
+   "LQ" => print 'l' ('d' in Intel mode) or 'q' for memory operand
           or suffix_always is true
+   "LB" => print "abs" in 64bit mode and behave as 'B' otherwise
+   "LS" => print "abs" in 64bit mode and behave as 'S' otherwise
+   "LV" => print "abs" for 64bit operand and behave as 'S' otherwise
 
    Many of the above letters print nothing in Intel mode.  See "putop"
    for the details.
@@ -1526,10 +1529,10 @@ static const struct dis386 dis386[] = {
   { "sahf",            { XX } },
   { "lahf",            { XX } },
   /* a0 */
-  { "movB",            { AL, Ob } },
-  { "movS",            { eAX, Ov } },
-  { "movB",            { Ob, AL } },
-  { "movS",            { Ov, eAX } },
+  { "mov%LB",          { AL, Ob } },
+  { "mov%LS",          { eAX, Ov } },
+  { "mov%LB",          { Ob, AL } },
+  { "mov%LS",          { Ov, eAX } },
   { "movs{b|}",                { Ybr, Xb } },
   { "movs{R|}",                { Yvr, Xv } },
   { "cmps{b|}",                { Xb, Yb } },
@@ -1553,14 +1556,14 @@ static const struct dis386 dis386[] = {
   { "movB",            { RMDH, Ib } },
   { "movB",            { RMBH, Ib } },
   /* b8 */
-  { "movS",            { RMeAX, Iv64 } },
-  { "movS",            { RMeCX, Iv64 } },
-  { "movS",            { RMeDX, Iv64 } },
-  { "movS",            { RMeBX, Iv64 } },
-  { "movS",            { RMeSP, Iv64 } },
-  { "movS",            { RMeBP, Iv64 } },
-  { "movS",            { RMeSI, Iv64 } },
-  { "movS",            { RMeDI, Iv64 } },
+  { "mov%LV",          { RMeAX, Iv64 } },
+  { "mov%LV",          { RMeCX, Iv64 } },
+  { "mov%LV",          { RMeDX, Iv64 } },
+  { "mov%LV",          { RMeBX, Iv64 } },
+  { "mov%LV",          { RMeSP, Iv64 } },
+  { "mov%LV",          { RMeBP, Iv64 } },
+  { "mov%LV",          { RMeSI, Iv64 } },
+  { "mov%LV",          { RMeDI, Iv64 } },
   /* c0 */
   { REG_TABLE (REG_C0) },
   { REG_TABLE (REG_C1) },
@@ -10267,10 +10270,34 @@ putop (const char *in_template, int sizeflag)
            *obufp++ = 'b';
          break;
        case 'B':
-         if (intel_syntax)
-           break;
-         if (sizeflag & SUFFIX_ALWAYS)
-           *obufp++ = 'b';
+         if (l == 0 && len == 1)
+           {
+case_B:
+             if (intel_syntax)
+               break;
+             if (sizeflag & SUFFIX_ALWAYS)
+               *obufp++ = 'b';
+           }
+         else
+           {
+             if (l != 1
+                 || len != 2
+                 || last[0] != 'L')
+               {
+                 SAVE_LAST (*p);
+                 break;
+               }
+
+             if (address_mode == mode_64bit
+                 && !(prefixes & PREFIX_ADDR))
+               {
+                 *obufp++ = 'a';
+                 *obufp++ = 'b';
+                 *obufp++ = 's';
+               }
+
+             goto case_B;
+           }
          break;
        case 'C':
          if (intel_syntax && !alt)
@@ -10506,31 +10533,76 @@ case_Q:
            used_prefixes |= (prefixes & PREFIX_DATA);
          break;
        case 'V':
-         if (intel_syntax)
-           break;
-         if (address_mode == mode_64bit && (sizeflag & DFLAG))
+         if (l == 0 && len == 1)
            {
-             if (sizeflag & SUFFIX_ALWAYS)
-               *obufp++ = 'q';
-             break;
+             if (intel_syntax)
+               break;
+             if (address_mode == mode_64bit && (sizeflag & DFLAG))
+               {
+                 if (sizeflag & SUFFIX_ALWAYS)
+                   *obufp++ = 'q';
+                 break;
+               }
+           }
+         else
+           {
+             if (l != 1
+                 || len != 2
+                 || last[0] != 'L')
+               {
+                 SAVE_LAST (*p);
+                 break;
+               }
+
+             if (rex & REX_W)
+               {
+                 *obufp++ = 'a';
+                 *obufp++ = 'b';
+                 *obufp++ = 's';
+               }
            }
          /* Fall through.  */
+         goto case_S;
        case 'S':
-         if (intel_syntax)
-           break;
-         if (sizeflag & SUFFIX_ALWAYS)
+         if (l == 0 && len == 1)
            {
-             if (rex & REX_W)
-               *obufp++ = 'q';
-             else
+case_S:
+             if (intel_syntax)
+               break;
+             if (sizeflag & SUFFIX_ALWAYS)
                {
-                 if (sizeflag & DFLAG)
-                   *obufp++ = 'l';
+                 if (rex & REX_W)
+                   *obufp++ = 'q';
                  else
-                   *obufp++ = 'w';
-                 used_prefixes |= (prefixes & PREFIX_DATA);
+                   {
+                     if (sizeflag & DFLAG)
+                       *obufp++ = 'l';
+                     else
+                       *obufp++ = 'w';
+                     used_prefixes |= (prefixes & PREFIX_DATA);
+                   }
                }
            }
+         else
+           {
+             if (l != 1
+                 || len != 2
+                 || last[0] != 'L')
+               {
+                 SAVE_LAST (*p);
+                 break;
+               }
+
+             if (address_mode == mode_64bit
+                 && !(prefixes & PREFIX_ADDR))
+               {
+                 *obufp++ = 'a';
+                 *obufp++ = 'b';
+                 *obufp++ = 's';
+               }
+
+             goto case_S;
+           }
          break;
        case 'X':
          if (l != 0 || len != 1)