x86: Fix x86 TLB and Walker

This patch adds a function to X86 tlb that returns the
walker port. This port is required for correctly connecting
the walker ports for the cpu just switched in

diff --git a/src/arch/x86/pagetable_walker.hh b/src/arch/x86/pagetable_walker.hh
index d433c7b98950976eab0070c80814b5fab33c2f66..90f07528060df3ff8bd03f322c75c42142c6d371 100644 (file)
--- a/src/arch/x86/pagetable_walker.hh
+++ b/src/arch/x86/pagetable_walker.hh
@@ -80,7 +80,6 @@ namespace X86ISA
 
         friend class WalkerPort;
         WalkerPort port;
-        Port *getPort(const std::string &if_name, int idx = -1);
 
         // State to track each walk of the page table
         class WalkerState : public FastAlloc
@@ -167,6 +166,7 @@ namespace X86ISA
                 RequestPtr req, BaseTLB::Mode mode);
         Fault startFunctional(ThreadContext * _tc, Addr &addr,
                 Addr &pageSize, BaseTLB::Mode mode);
+        Port *getPort(const std::string &if_name, int idx = -1);
 
       protected:
         // The TLB we're supposed to load.

diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc
index ff65eb04cce8dd46f91b4eaf75dcba3cd8f223f5..456f03208e35d2f383ef025c2d9d68481ccc63fc 100644 (file)
--- a/src/arch/x86/tlb.cc
+++ b/src/arch/x86/tlb.cc
@@ -421,6 +421,12 @@ TLB::unserialize(Checkpoint *cp, const std::string &section)
 {
 }
 
+Port *
+TLB::getPort()
+{
+    return walker->getPort("port");
+}
+
 } // namespace X86ISA
 
 X86ISA::TLB *

diff --git a/src/arch/x86/tlb.hh b/src/arch/x86/tlb.hh
index 449ca19ce0633fe6523ad80019a39cca7f81fffd..a943683af1514dcc185116300c4215569fa75d0b 100644 (file)
--- a/src/arch/x86/tlb.hh
+++ b/src/arch/x86/tlb.hh
@@ -120,6 +120,8 @@ namespace X86ISA
         // Checkpointing
         virtual void serialize(std::ostream &os);
         virtual void unserialize(Checkpoint *cp, const std::string &section);
+
+        virtual Port * getPort();
     };
 }