i965: Fix texturing on pre-gen5.
authorEric Anholt <eric@anholt.net>
Fri, 15 Oct 2010 00:01:06 +0000 (17:01 -0700)
committerEric Anholt <eric@anholt.net>
Fri, 15 Oct 2010 00:13:19 +0000 (17:13 -0700)
I broke it in 06fd639c519214b6ebcbf29127b6d9ed429f8641 by only testing
2 generations of hardware :(

src/mesa/drivers/dri/i965/brw_fs.cpp

index e372f3a13da2f0eb1f59b5ff53790f4bc3b094f4..41cb9a3be43c4c8afaf49638df472ecef405794a 100644 (file)
@@ -1043,7 +1043,7 @@ fs_visitor::emit_texture_gen4(ir_texture *ir, fs_reg dst, fs_reg coordinate)
        */
       assert(ir->op == ir_txb || ir->op == ir_txl);
 
-      for (int i = 0; i < ir->coordinate->type->vector_elements * 2;) {
+      for (int i = 0; i < ir->coordinate->type->vector_elements; i++) {
         emit(fs_inst(BRW_OPCODE_MOV, fs_reg(MRF, base_mrf + mlen + i * 2),
                      coordinate));
         coordinate.reg_offset++;
@@ -1993,17 +1993,17 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg dst)
          */
         msg_type = BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE;
         if (inst->shadow_compare) {
-           assert(inst->mlen == 5);
+           assert(inst->mlen == 6);
         } else {
-           assert(inst->mlen <= 6);
+           assert(inst->mlen <= 4);
         }
         break;
       case FS_OPCODE_TXB:
         if (inst->shadow_compare) {
-           assert(inst->mlen == 5);
+           assert(inst->mlen == 6);
            msg_type = BRW_SAMPLER_MESSAGE_SIMD8_SAMPLE;
         } else {
-           assert(inst->mlen == 8);
+           assert(inst->mlen == 9);
            msg_type = BRW_SAMPLER_MESSAGE_SIMD16_SAMPLE_BIAS;
            simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
         }