i965: Add new HiZ related bits to WM_STATE.

diff --git a/src/mesa/drivers/dri/i965/brw_structs.h b/src/mesa/drivers/dri/i965/brw_structs.h
index 8b6646ca513b1310d2e142b5e7c2943261af0d73..6687a89e80ad6bc8a09459542c69f8fcc23518ce 100644 (file)
--- a/src/mesa/drivers/dri/i965/brw_structs.h
+++ b/src/mesa/drivers/dri/i965/brw_structs.h
@@ -1017,7 +1017,14 @@ struct brw_wm_unit_state
       GLuint enable_32_pix:1; 
       GLuint enable_con_32_pix:1;
       GLuint enable_con_64_pix:1;
-      GLuint pad0:5;
+      GLuint pad0:1;
+
+      /* These next four bits are for Ironlake+ */
+      GLuint fast_span_coverage_enable:1;
+      GLuint depth_buffer_clear:1;
+      GLuint depth_buffer_resolve_enable:1;
+      GLuint hierarchical_depth_buffer_resolve_enable:1;
+
       GLuint legacy_global_depth_bias:1; 
       GLuint line_stipple:1; 
       GLuint depth_offset:1;