bfd/

2014-02-04  Heiher <r@hev.cc>

	* elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
	Loongson-3A.
	(mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
	extension of bfd_mach_mipsisa64r2.

opcodes/
2014-02-04  Heiher <r@hev.cc>

	* mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.

gas/
2014-02-04  Heiher <r@hev.cc>

	* config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
	Loongson-3A.

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index a7977420c1719f42b3331c05a4506bb1483b964a..e384e493f18be764e03065e84bb6437dbd85a385 100644 (file)
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2014-03-04  Heiher <r@hev.cc>
+
+       * elfxx-mips.c (mips_set_isa_flags): Use E_MIPS_ARCH_64R2 for
+       Loongson-3A.
+       (mips_mach_extensions): Make bfd_mach_mips_loongson_3a an
+       extension of bfd_mach_mipsisa64r2.
+
 2014-03-04  Nick Clifton  <nickc@redhat.com>
 
        PR ld/16017

diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
index 9011b6de47864ac33b7afe969f3e34abced6f94e..a395eefae4d5a29ac953f6f0a86d11180f01c312 100644 (file)
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -11624,7 +11624,7 @@ mips_set_isa_flags (bfd *abfd)
       break;
 
     case bfd_mach_mips_loongson_3a:
-      val = E_MIPS_ARCH_64 | E_MIPS_MACH_LS3A;
+      val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_LS3A;
       break;
 
     case bfd_mach_mips_octeon:
@@ -14208,12 +14208,12 @@ static const struct mips_mach_extension mips_mach_extensions[] =
   { bfd_mach_mips_octeon2, bfd_mach_mips_octeonp },
   { bfd_mach_mips_octeonp, bfd_mach_mips_octeon },
   { bfd_mach_mips_octeon, bfd_mach_mipsisa64r2 },
+  { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64r2 },
 
   /* MIPS64 extensions.  */
   { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
   { bfd_mach_mips_sb1, bfd_mach_mipsisa64 },
   { bfd_mach_mips_xlr, bfd_mach_mipsisa64 },
-  { bfd_mach_mips_loongson_3a, bfd_mach_mipsisa64 },
 
   /* MIPS V extensions.  */
   { bfd_mach_mipsisa64, bfd_mach_mips5 },

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 66d405f7fa51292df1d86d1abbe8b6989037d130..96b590e8910b77a7616e611feb13108dccb45532 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2014-03-04  Heiher <r@hev.cc>
+
+       * config/tc-mips.c (mips_cpu_info_table): Use ISA_MIPS64R2 for
+       Loongson-3A.
+
 2014-03-03  Nick Clifton  <nickc@redhat.com>
 
        * config/msp430/msp430.c: Replace known mcu array with known

diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 34f1bf0782dc7ed78de1da4b78833aa6c2e4ecb8..7f5b3c120a22b91b59bf9392f12ae8f7a9fca7c9 100644 (file)
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -17904,7 +17904,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
   /* Broadcom SB-1A CPU core */
   { "sb1a",           0, ASE_MIPS3D | ASE_MDMX,        ISA_MIPS64,   CPU_SB1 },
   
-  { "loongson3a",     0, 0,                    ISA_MIPS64,   CPU_LOONGSON_3A },
+  { "loongson3a",     0, 0,                    ISA_MIPS64R2, CPU_LOONGSON_3A },
 
   /* MIPS 64 Release 2 */
 

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ea74ba6522690476078751954a14ac691ed9b6f0..7ac215438267cf407db315fc01fb44cc902b6f7f 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2014-03-04  Heiher <r@hev.cc>
+
+       * mips-dis.c (mips_arch_choices): Usee ISA_MIPS64R2 for Loongson-3A.
+
 2014-03-04  Richard Sandiford  <rdsandiford@googlemail.com>
 
        * mips-opc.c (mips_builtin_opcodes): Move the udi* instructions

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 09a2ed1309e7d12b5a7367a35e10e41d6fc34de9..12bb7b99b940be3a45e97e50006dd5c7b501c7ee 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -588,7 +588,7 @@ const struct mips_arch_choice mips_arch_choices[] =
     NULL, 0, mips_cp1_names_numeric, mips_hwr_names_numeric },
 
   { "loongson3a",   1, bfd_mach_mips_loongson_3a, CPU_LOONGSON_3A,
-    ISA_MIPS64 | INSN_LOONGSON_3A, 0, mips_cp0_names_numeric,
+    ISA_MIPS64R2 | INSN_LOONGSON_3A, 0, mips_cp0_names_numeric,
     NULL, 0, mips_cp1_names_mips3264, mips_hwr_names_numeric },
 
   { "octeon",   1, bfd_mach_mips_octeon, CPU_OCTEON,