S/390: Change 2-byte NOPs
authorRobin Dapp <rdapp@linux.vnet.ibm.com>
Mon, 6 Mar 2017 12:40:19 +0000 (12:40 +0000)
committerAndreas Krebbel <krebbel@gcc.gnu.org>
Mon, 6 Mar 2017 12:40:19 +0000 (12:40 +0000)
The following patch changes "nopr %r7" to "nopr %r0" which is
advantageous from a hardware perspective. It will only be emitted for
hotpatching and should not impact normal code.

gcc/ChangeLog:

2017-03-06  Robin Dapp  <rdapp@linux.vnet.ibm.com>

* config/s390/s390.c (s390_asm_output_function_label): Use nopr %r0.
* config/s390/s390.md: Likewise.

gcc/testsuite/ChangeLog:

2017-03-06  Robin Dapp  <rdapp@linux.vnet.ibm.com>

* gcc.target/s390/hotpatch-1.c: Check for nopr %r0.
* gcc.target/s390/hotpatch-10.c: Likewise.
* gcc.target/s390/hotpatch-11.c: Likewise.
* gcc.target/s390/hotpatch-12.c: Likewise.
* gcc.target/s390/hotpatch-13.c: Likewise.
* gcc.target/s390/hotpatch-14.c: Likewise.
* gcc.target/s390/hotpatch-15.c: Likewise.
* gcc.target/s390/hotpatch-16.c: Likewise.
* gcc.target/s390/hotpatch-17.c: Likewise.
* gcc.target/s390/hotpatch-18.c: Likewise.
* gcc.target/s390/hotpatch-19.c: Likewise.
* gcc.target/s390/hotpatch-2.c: Likewise.
* gcc.target/s390/hotpatch-26.c: Likewise.
* gcc.target/s390/hotpatch-27.c: Likewise.
* gcc.target/s390/hotpatch-28.c: Likewise.
* gcc.target/s390/hotpatch-3.c: Likewise.
* gcc.target/s390/hotpatch-4.c: Likewise.
* gcc.target/s390/hotpatch-5.c: Likewise.
* gcc.target/s390/hotpatch-6.c: Likewise.
* gcc.target/s390/hotpatch-7.c: Likewise.
* gcc.target/s390/hotpatch-8.c: Likewise.
* gcc.target/s390/hotpatch-9.c: Likewise.

From-SVN: r245917

26 files changed:
gcc/ChangeLog
gcc/config/s390/s390.c
gcc/config/s390/s390.md
gcc/testsuite/ChangeLog
gcc/testsuite/gcc.target/s390/hotpatch-1.c
gcc/testsuite/gcc.target/s390/hotpatch-10.c
gcc/testsuite/gcc.target/s390/hotpatch-11.c
gcc/testsuite/gcc.target/s390/hotpatch-12.c
gcc/testsuite/gcc.target/s390/hotpatch-13.c
gcc/testsuite/gcc.target/s390/hotpatch-14.c
gcc/testsuite/gcc.target/s390/hotpatch-15.c
gcc/testsuite/gcc.target/s390/hotpatch-16.c
gcc/testsuite/gcc.target/s390/hotpatch-17.c
gcc/testsuite/gcc.target/s390/hotpatch-18.c
gcc/testsuite/gcc.target/s390/hotpatch-19.c
gcc/testsuite/gcc.target/s390/hotpatch-2.c
gcc/testsuite/gcc.target/s390/hotpatch-26.c
gcc/testsuite/gcc.target/s390/hotpatch-27.c
gcc/testsuite/gcc.target/s390/hotpatch-28.c
gcc/testsuite/gcc.target/s390/hotpatch-3.c
gcc/testsuite/gcc.target/s390/hotpatch-4.c
gcc/testsuite/gcc.target/s390/hotpatch-5.c
gcc/testsuite/gcc.target/s390/hotpatch-6.c
gcc/testsuite/gcc.target/s390/hotpatch-7.c
gcc/testsuite/gcc.target/s390/hotpatch-8.c
gcc/testsuite/gcc.target/s390/hotpatch-9.c

index 27a3472543d48fdf2b21e3283716fa9504ba236f..8393f03aec4918c6e012882682a77837be4a749e 100644 (file)
@@ -1,3 +1,8 @@
+2017-03-06  Robin Dapp  <rdapp@linux.vnet.ibm.com>
+
+       * config/s390/s390.c (s390_asm_output_function_label): Use nopr %r0.
+       * config/s390/s390.md: Likewise.
+
 2017-03-06  Jakub Jelinek  <jakub@redhat.com>
 
        PR target/79812
index f98eee70042aa54bf33d9514ff37f7c236543da7..e8265c6add55083a1884e17fd5d97e85820c10eb 100644 (file)
@@ -7218,11 +7218,11 @@ s390_asm_output_function_label (FILE *asm_out_file, const char *fname,
       /* Add a trampoline code area before the function label and initialize it
         with two-byte nop instructions.  This area can be overwritten with code
         that jumps to a patched version of the function.  */
-      asm_fprintf (asm_out_file, "\tnopr\t%%r7"
+      asm_fprintf (asm_out_file, "\tnopr\t%%r0"
                   "\t# pre-label NOPs for hotpatch (%d halfwords)\n",
                   hw_before);
       for (i = 1; i < hw_before; i++)
-       fputs ("\tnopr\t%r7\n", asm_out_file);
+       fputs ("\tnopr\t%r0\n", asm_out_file);
 
       /* Note:  The function label must be aligned so that (a) the bytes of the
         following nop do not cross a cacheline boundary, and (b) a jump address
index 7d2659e884b9f9dbcd9de611fb097103c22545bd..164a644b3ae82f2335996b3a7ba1c89ca1fe111c 100644 (file)
 (define_insn "nop_2_byte"
   [(unspec_volatile [(const_int 0)] UNSPECV_NOP_2_BYTE)]
   ""
-  "nopr\t%%r7"
+  "nopr\t%%r0"
   [(set_attr "op_type" "RR")])
 
 (define_insn "nop_4_byte"
index 43c19c347950f74896fe72ca3d810a5d49cd6c19..a6efef5e0b8a68ea02b7db4978530649a6869bf4 100644 (file)
@@ -1,3 +1,28 @@
+2017-03-06  Robin Dapp  <rdapp@linux.vnet.ibm.com>
+
+       * gcc.target/s390/hotpatch-1.c: Check for nopr %r0.
+       * gcc.target/s390/hotpatch-10.c: Likewise.
+       * gcc.target/s390/hotpatch-11.c: Likewise.
+       * gcc.target/s390/hotpatch-12.c: Likewise.
+       * gcc.target/s390/hotpatch-13.c: Likewise.
+       * gcc.target/s390/hotpatch-14.c: Likewise.
+       * gcc.target/s390/hotpatch-15.c: Likewise.
+       * gcc.target/s390/hotpatch-16.c: Likewise.
+       * gcc.target/s390/hotpatch-17.c: Likewise.
+       * gcc.target/s390/hotpatch-18.c: Likewise.
+       * gcc.target/s390/hotpatch-19.c: Likewise.
+       * gcc.target/s390/hotpatch-2.c: Likewise.
+       * gcc.target/s390/hotpatch-26.c: Likewise.
+       * gcc.target/s390/hotpatch-27.c: Likewise.
+       * gcc.target/s390/hotpatch-28.c: Likewise.
+       * gcc.target/s390/hotpatch-3.c: Likewise.
+       * gcc.target/s390/hotpatch-4.c: Likewise.
+       * gcc.target/s390/hotpatch-5.c: Likewise.
+       * gcc.target/s390/hotpatch-6.c: Likewise.
+       * gcc.target/s390/hotpatch-7.c: Likewise.
+       * gcc.target/s390/hotpatch-8.c: Likewise.
+       * gcc.target/s390/hotpatch-9.c: Likewise.
+
 2017-03-06  Paolo Carlini  <paolo.carlini@oracle.com>
 
        PR c++/64574
index 55088b8b65582ee91aa39c3f0bfd0251a8939933..5f0f2e193495171a0b144b97c91912482fdddd33 100644 (file)
@@ -13,7 +13,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index d2cb9a2ee86c5f91505af175cb30490bba81f4d5..2308d3331a0f3e441fe1b9950d2421d67b2953ae 100644 (file)
@@ -13,7 +13,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index cabb9d263abdd0faa8fd0533b8a42ee41f51062c..56b3596d49707e18e6da04176f7abe151c9ac139 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
index fc9adc3336941b2e2a80126c2a512af592a48f78..8a91c1b8b060c762547366c28c4013413383516c 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label.*(999 halfwords)" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 999 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 999 } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
index b25fbd3f2aee4db7831d46309f0778df2dc13487..70fab74d18dc6a098b588ea2ec735e41584ef9bd 100644 (file)
@@ -14,7 +14,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler "alignment for hotpatch" } } */
index c387d6bf0638a75cdb619af792c8bf65ab00a088..389bf42aee8d465e8be4f87f355ae4f01a7fdec9 100644 (file)
@@ -14,7 +14,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index 410106bb7ca294a24372d6f8316e675a46002691..0b10fb18b4144648493da2c40af6fc05acd89418 100644 (file)
@@ -14,6 +14,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
index fa06fff491fa8def33116537e9fb49e863b497b0..2fcdf1ce7657612a0996602d3934dad4a78ee1cd 100644 (file)
@@ -14,6 +14,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
index 3ef7d69b57253e37b1cba8503c2ad25443a32da5..299f82505eefebad8cb68936ce849c3fb85e048a 100644 (file)
@@ -14,7 +14,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index c93af7fa99b0c4c37a93459042a3e671fe209b66..fd44d1183237b1ecd053bab2543bd554813679af 100644 (file)
@@ -13,7 +13,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler-not "post-label NOPs" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index bb8a137edb062b18e9cd053478ec5ac0b07b8d46..899e000a71fbdc952eed1049d7c2cd5eb577b191 100644 (file)
@@ -19,6 +19,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label.*(1 halfwords)" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
index 2a2665e258510fb2268a324935694255e2da018d..99fe9114f24731f2bbfc721e63e75ef5e1c2e737 100644 (file)
@@ -13,7 +13,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(1 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nopr\t" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index eb95c26e25766729f18dba3b9ab7cfd60b2866ac..ba2ef1870f273bedeb0659c14dd66a66696c4f3a 100644 (file)
@@ -11,7 +11,7 @@ __attribute__ ((noreturn)) void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler "alignment for hotpatch" } } */
index cdbd4caf90e18f2e12b114bc223232cc5c48c01c..af1d276951ce63c657fbf654a6535418b8fa015e 100644 (file)
@@ -11,7 +11,7 @@ __attribute__ ((noreturn)) void hp3(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler "alignment for hotpatch" } } */
index 9922daa8ac45376e3805e88263de7d2ed07428b0..f8770c4d35ccba7ec516146ab2d44bb828c0126d 100644 (file)
@@ -12,7 +12,7 @@ void hp1 (volatile unsigned int *i)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler "alignment for hotpatch" } } */
index 671859116d480fdd87270ab6b7bc5216e202dfd5..20f43c6b4586761cd2e8170d74dd9f843737e019 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(2 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
index b770d4bd671d7ac91f0bca1772ce182554e41f90..32a3c032d65e77dca1c8eacad1572670cf7eb183 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(3 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
index f1dcd89def6ad0ee25e45a41f9851d7c8c7cd1a6..72ee5a30056854fc5c43f9b83a82bcc2dbcdefa0 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(4 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
index 6203a72ba2edae73a7a53dff20213ddafd8c2bc4..1e1d0e6973a0f7074b0cd5185fa72e2cff087aff 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(5 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-times "brcl\t0, 0" 1 } } */
index e201ae940e6874ece6afab1f779413458841e875..3f60e61e7e2eed114d0a0107531fa9cb199b0a5d 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(6 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*brcl\t0, 0" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-not "nop\t0" } } */
 /* { dg-final { scan-assembler-times "brcl\t0, 0" 2 } } */
index c5b71a509b521400b513430389bb5c79507690bb..012a4ebd44d8eec47cb3208c7d317b95a9423baa 100644 (file)
@@ -13,7 +13,7 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(3 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-times "nopr\t%r7" 1 } } */
+/* { dg-final { scan-assembler-times "nopr\t%r0" 1 } } */
 /* { dg-final { scan-assembler-times "nop\t0" 1 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */
 /* { dg-final { scan-assembler-not "alignment for hotpatch" } } */
index 9ccc8fd66fe2979283a81264ba80b1d2a9ff30f0..b7d557e43a28ed78cb75a200e8afc69fe6cc978b 100644 (file)
@@ -13,6 +13,6 @@ void hp1(void)
 /* Check number of occurences of certain instructions.  */
 /* { dg-final { scan-assembler-not "pre-label NOPs" } } */
 /* { dg-final { scan-assembler "^\[^.\].*:\n.*post-label.*(4 halfwords).*\n\(\(.L.*:\n\)\|\(\[\[:space:\]\]*.cfi_.*\n\)\)*\[\[:space:\]\]*nop\t0" } } */
-/* { dg-final { scan-assembler-not "nopr\t%r7" } } */
+/* { dg-final { scan-assembler-not "nopr\t%r0" } } */
 /* { dg-final { scan-assembler-times "nop\t0" 2 } } */
 /* { dg-final { scan-assembler-not "brcl\t0, 0" } } */