[AArch64] Simplify ashl<mode>3 expander for SHORT modes
authorKyrylo Tkachov <kyrylo.tkachov@arm.com>
Fri, 27 May 2016 11:21:46 +0000 (11:21 +0000)
committerKyrylo Tkachov <ktkachov@gcc.gnu.org>
Fri, 27 May 2016 11:21:46 +0000 (11:21 +0000)
* config/aarch64/aarch64.md (ashl<mode>3, SHORT modes):
Use const_int_operand for operand 2 predicate.  Simplify expand code
as a result.

From-SVN: r236812

gcc/ChangeLog
gcc/config/aarch64/aarch64.md

index b598a4eff746c93fe0f5f42e2fadc9ab8e6f3294..2d59cb5032b38da56d32acbf8f76ee595a9616af 100644 (file)
@@ -1,3 +1,9 @@
+2016-05-27  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       * config/aarch64/aarch64.md (ashl<mode>3, SHORT modes):
+       Use const_int_operand for operand 2 predicate.  Simplify expand code
+       as a result.
+
 2016-05-27  Ilya Enkovich  <ilya.enkovich@intel.com>
 
        PR middle-end/71279
index 223a4cc6d31236865b79770b85fb48cb60383328..f04f7daed276ad53619623405c384ffe300fc8c1 100644 (file)
 (define_expand "ashl<mode>3"
   [(set (match_operand:SHORT 0 "register_operand")
        (ashift:SHORT (match_operand:SHORT 1 "register_operand")
-                     (match_operand:QI 2 "nonmemory_operand")))]
+                     (match_operand:QI 2 "const_int_operand")))]
   ""
   {
-    if (CONST_INT_P (operands[2]))
-      {
-        operands[2] = GEN_INT (INTVAL (operands[2])
-                               & (GET_MODE_BITSIZE (<MODE>mode) - 1));
+    operands[2] = GEN_INT (INTVAL (operands[2]) & GET_MODE_MASK (<MODE>mode));
 
-        if (operands[2] == const0_rtx)
-          {
-           emit_insn (gen_mov<mode> (operands[0], operands[1]));
-           DONE;
-          }
+    if (operands[2] == const0_rtx)
+      {
+       emit_insn (gen_mov<mode> (operands[0], operands[1]));
+       DONE;
       }
-    else
-      FAIL;
   }
 )