soc/software/bios/boot: add vexriscv workaround

Flushing icache was working correctly on previous version of Vexriscv, understand
why it's no longer the case.

diff --git a/litex/soc/software/bios/boot.c b/litex/soc/software/bios/boot.c
index e6e0ce246e0a3fba20d4b694f1623ae6004449c4..473b99584c3b8b6ac16223e96ce6698debbf599b 100644 (file)
--- a/litex/soc/software/bios/boot.c
+++ b/litex/soc/software/bios/boot.c
@@ -25,7 +25,10 @@ static void __attribute__((noreturn)) boot(unsigned int r1, unsigned int r2, uns
        uart_sync();
        irq_setmask(0);
        irq_setie(0);
+/* FIXME: understand why flushing icache on Vexriscv make boot fail  */
+#ifndef __vexriscv__
        flush_cpu_icache();
+#endif
        flush_cpu_dcache();
 #ifdef L2_SIZE
        flush_l2_cache();