struct iris_batch *batch,
const struct pipe_grid_info *grid);
void (*rebind_buffer)(struct iris_context *ice,
- struct iris_resource *res,
- uint64_t old_address);
+ struct iris_resource *res);
void (*resolve_conditional_render)(struct iris_context *ice);
void (*load_register_reg32)(struct iris_batch *batch, uint32_t dst,
uint32_t src);
/* Rebind the buffer, replacing any state referring to the old BO's
* address, and marking state dirty so it's reemitted.
*/
- ice->vtbl.rebind_buffer(ice, res, old_bo->gtt_offset);
+ ice->vtbl.rebind_buffer(ice, res);
util_range_set_empty(&res->valid_buffer_range);
static void
iris_rebind_buffer(struct iris_context *ice,
- struct iris_resource *res,
- uint64_t old_address)
+ struct iris_resource *res)
{
struct pipe_context *ctx = &ice->ctx;
struct iris_screen *screen = (void *) ctx->screen;
STATIC_ASSERT(GENX(VERTEX_BUFFER_STATE_BufferStartingAddress_start) == 32);
STATIC_ASSERT(GENX(VERTEX_BUFFER_STATE_BufferStartingAddress_bits) == 64);
uint64_t *addr = (uint64_t *) &state->state[1];
+ struct iris_bo *bo = iris_resource_bo(state->resource);
- if (*addr == old_address + state->offset) {
- *addr = res->bo->gtt_offset + state->offset;
+ if (*addr != bo->gtt_offset + state->offset) {
+ *addr = bo->gtt_offset + state->offset;
ice->state.dirty |= IRIS_DIRTY_VERTEX_BUFFERS;
}
}