radeonsi: Handle SUB_f32.
authorThomas Stellard <tom.stellard@amd.com>
Thu, 7 Jun 2012 17:33:24 +0000 (19:33 +0200)
committerMichel Dänzer <michel@daenzer.net>
Tue, 12 Jun 2012 16:48:16 +0000 (18:48 +0200)
Signed-off-by: Thomas Stellard <tom.stellard@amd.com>
Signed-off-by: Michel Dänzer <michel.daenzer@amd.com>
src/gallium/drivers/radeon/AMDILInstructions.td
src/gallium/drivers/radeon/SIInstructions.td

index ec3f8cbe31b70a30b2f516c97be94b0551b9ed47..cb3d22a7662a8f299d86872a752f62917ba026fb 100644 (file)
@@ -230,7 +230,6 @@ defm DIV  : BinaryIntrinsicFloat<IL_OP_DIV, int_AMDIL_div>;
 defm FMA  : TernaryIntrinsicFloat<IL_OP_FMA, int_AMDIL_fma>;
 defm LERP  : TernaryIntrinsicFloat<IL_OP_LERP, int_AMDIL_lerp>;
   }
-defm SUB  : BinaryOpMCf32<IL_OP_SUB, fsub>;
 defm NEAR : UnaryOpMCf32<IL_OP_ROUND_NEAR, fnearbyint>;
 defm RND_Z : UnaryOpMCf32<IL_OP_ROUND_ZERO, ftrunc>;
 
index 8fd0c4933fdddd7d43a3fc7ea785325e4909235a..a96d7839fba70c33444c53e9e6d0f07e14c02150 100644 (file)
@@ -602,7 +602,9 @@ defm V_ADD_F32 : VOP2_32 <
   [(set VReg_32:$dst, (fadd AllReg_32:$src0, VReg_32:$src1))]
 >;
 
-defm V_SUB_F32 : VOP2_32 <0x00000004, "V_SUB_F32", []>;
+defm V_SUB_F32 : VOP2_32 <0x00000004, "V_SUB_F32",
+  [(set VReg_32:$dst, (fsub AllReg_32:$src0, VReg_32:$src1))]
+>;
 defm V_SUBREV_F32 : VOP2_32 <0x00000005, "V_SUBREV_F32", []>;
 defm V_MAC_LEGACY_F32 : VOP2_32 <0x00000006, "V_MAC_LEGACY_F32", []>;
 defm V_MUL_LEGACY_F32 : VOP2_32 <