sim: mn10300: move libsim.a creation to top-level
authorMike Frysinger <vapier@gentoo.org>
Tue, 27 Dec 2022 03:10:41 +0000 (22:10 -0500)
committerMike Frysinger <vapier@gentoo.org>
Tue, 10 Jan 2023 06:15:25 +0000 (01:15 -0500)
The objects are still compiled in the subdir, but the creation of the
archive itself is in the top-level.  This is a required step before we
can move compilation itself up, and makes it easier to review.

The downside is that each object compile is a recursive make instead of
a single one.  On my 4 core system, it adds ~100msec to the build per
port, so it's not great, but it shouldn't be a big deal.  This will go
away of course once the top-level compiles objects.

sim/Makefile.in
sim/mn10300/Makefile.in
sim/mn10300/local.mk

index b1cc44cd2af5386a259d68df2247351b25444729..14d801b5eab2ac21a5ef8e43122259e5eb1be554 100644 (file)
@@ -286,9 +286,10 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
 @SIM_ENABLE_ARCH_mips_TRUE@am__append_98 = $(mips_BUILD_OUTPUTS)
 @SIM_ENABLE_ARCH_mips_TRUE@am__append_99 = $(mips_BUILD_OUTPUTS)
 @SIM_ENABLE_ARCH_mips_TRUE@am__append_100 = mips/multi-include.h mips/multi-run.c
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/run
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = \
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_101 = mn10300/libsim.a
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_102 = mn10300/run
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_103 = mn10300_SIM_EXTRA_HW_DEVICES="$(mn10300_SIM_EXTRA_HW_DEVICES)"
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = \
 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \
 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \
 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \
@@ -297,29 +298,29 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \
 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h
 
-@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_104 = $(mn10300_BUILD_OUTPUTS)
 @SIM_ENABLE_ARCH_mn10300_TRUE@am__append_105 = $(mn10300_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_moxie_TRUE@am__append_106 = moxie/run
-@SIM_ENABLE_ARCH_msp430_TRUE@am__append_107 = msp430/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_108 = or1k/run
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_109 = or1k/eng.h
-@SIM_ENABLE_ARCH_or1k_TRUE@am__append_110 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@am__append_106 = $(mn10300_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_moxie_TRUE@am__append_107 = moxie/run
+@SIM_ENABLE_ARCH_msp430_TRUE@am__append_108 = msp430/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_109 = or1k/run
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_110 = or1k/eng.h
 @SIM_ENABLE_ARCH_or1k_TRUE@am__append_111 = $(or1k_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_ppc_TRUE@am__append_112 = ppc/run ppc/psim
-@SIM_ENABLE_ARCH_pru_TRUE@am__append_113 = pru/run
-@SIM_ENABLE_ARCH_riscv_TRUE@am__append_114 = riscv/run
-@SIM_ENABLE_ARCH_rl78_TRUE@am__append_115 = rl78/run
-@SIM_ENABLE_ARCH_rx_TRUE@am__append_116 = rx/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_117 = sh/run
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_118 = \
+@SIM_ENABLE_ARCH_or1k_TRUE@am__append_112 = $(or1k_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_ppc_TRUE@am__append_113 = ppc/run ppc/psim
+@SIM_ENABLE_ARCH_pru_TRUE@am__append_114 = pru/run
+@SIM_ENABLE_ARCH_riscv_TRUE@am__append_115 = riscv/run
+@SIM_ENABLE_ARCH_rl78_TRUE@am__append_116 = rl78/run
+@SIM_ENABLE_ARCH_rx_TRUE@am__append_117 = rx/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_118 = sh/run
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_119 = \
 @SIM_ENABLE_ARCH_sh_TRUE@      sh/code.c \
 @SIM_ENABLE_ARCH_sh_TRUE@      sh/ppi.c
 
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_119 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_120 = sh/gencode
-@SIM_ENABLE_ARCH_sh_TRUE@am__append_121 = $(sh_BUILD_OUTPUTS)
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_122 = v850/run
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_123 = \
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_120 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_121 = sh/gencode
+@SIM_ENABLE_ARCH_sh_TRUE@am__append_122 = $(sh_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_123 = v850/run
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_124 = \
 @SIM_ENABLE_ARCH_v850_TRUE@    v850/icache.h \
 @SIM_ENABLE_ARCH_v850_TRUE@    v850/idecode.h \
 @SIM_ENABLE_ARCH_v850_TRUE@    v850/semantics.h \
@@ -328,8 +329,8 @@ TESTS = testsuite/common/bits32m0$(EXEEXT) \
 @SIM_ENABLE_ARCH_v850_TRUE@    v850/itable.h \
 @SIM_ENABLE_ARCH_v850_TRUE@    v850/engine.h
 
-@SIM_ENABLE_ARCH_v850_TRUE@am__append_124 = $(v850_BUILD_OUTPUTS)
 @SIM_ENABLE_ARCH_v850_TRUE@am__append_125 = $(v850_BUILD_OUTPUTS)
+@SIM_ENABLE_ARCH_v850_TRUE@am__append_126 = $(v850_BUILD_OUTPUTS)
 subdir = .
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
 am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
@@ -735,6 +736,26 @@ am__DEPENDENCIES_1 =
 @SIM_ENABLE_ARCH_mips_TRUE@    mips/sim-resume.o
 am_mips_libsim_a_OBJECTS =
 mips_libsim_a_OBJECTS = $(am_mips_libsim_a_OBJECTS)
+mn10300_libsim_a_AR = $(AR) $(ARFLAGS)
+@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_DEPENDENCIES =  \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o mn10300/irun.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o $(patsubst \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o
+am_mn10300_libsim_a_OBJECTS =
+mn10300_libsim_a_OBJECTS = $(am_mn10300_libsim_a_OBJECTS)
 @SIM_ENABLE_IGEN_TRUE@am__EXEEXT_1 = $(IGEN) igen/filter$(EXEEXT) \
 @SIM_ENABLE_IGEN_TRUE@ igen/gen$(EXEEXT) igen/ld-cache$(EXEEXT) \
 @SIM_ENABLE_IGEN_TRUE@ igen/ld-decode$(EXEEXT) \
@@ -1068,12 +1089,12 @@ SOURCES = $(aarch64_libsim_a_SOURCES) $(arm_libsim_a_SOURCES) \
        $(lm32_libsim_a_SOURCES) $(m32c_libsim_a_SOURCES) \
        $(m32r_libsim_a_SOURCES) $(m68hc11_libsim_a_SOURCES) \
        $(mcore_libsim_a_SOURCES) $(microblaze_libsim_a_SOURCES) \
-       $(mips_libsim_a_SOURCES) $(aarch64_run_SOURCES) \
-       $(arm_run_SOURCES) $(avr_run_SOURCES) $(bfin_run_SOURCES) \
-       $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) $(cr16_run_SOURCES) \
-       $(cris_run_SOURCES) $(cris_rvdummy_SOURCES) \
-       $(d10v_gencode_SOURCES) $(d10v_run_SOURCES) \
-       $(erc32_run_SOURCES) erc32/sis.c \
+       $(mips_libsim_a_SOURCES) $(mn10300_libsim_a_SOURCES) \
+       $(aarch64_run_SOURCES) $(arm_run_SOURCES) $(avr_run_SOURCES) \
+       $(bfin_run_SOURCES) $(bpf_run_SOURCES) $(cr16_gencode_SOURCES) \
+       $(cr16_run_SOURCES) $(cris_run_SOURCES) \
+       $(cris_rvdummy_SOURCES) $(d10v_gencode_SOURCES) \
+       $(d10v_run_SOURCES) $(erc32_run_SOURCES) erc32/sis.c \
        $(example_synacor_run_SOURCES) $(frv_run_SOURCES) \
        $(ft32_run_SOURCES) $(h8300_run_SOURCES) \
        $(igen_filter_SOURCES) $(igen_gen_SOURCES) \
@@ -1626,7 +1647,7 @@ SUBDIRS = @subdirs@ $(SIM_SUBDIRS)
 AM_MAKEFLAGS = SIM_NEW_COMMON_OBJS_="$(SIM_NEW_COMMON_OBJS)" \
        $(am__append_3) $(am__append_16) $(am__append_30) \
        $(am__append_63) $(am__append_74) $(am__append_80) \
-       $(am__append_93) $(am__append_102)
+       $(am__append_93) $(am__append_103)
 pkginclude_HEADERS = $(am__append_1)
 noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
        $(am__append_10) $(am__append_12) $(am__append_14) \
@@ -1635,12 +1656,12 @@ noinst_LIBRARIES = common/libcommon.a $(am__append_5) $(am__append_8) \
        $(am__append_47) $(am__append_52) $(am__append_54) \
        $(am__append_56) $(am__append_61) $(am__append_67) \
        $(am__append_72) $(am__append_78) $(am__append_84) \
-       $(am__append_86) $(am__append_91)
+       $(am__append_86) $(am__append_91) $(am__append_101)
 BUILT_SOURCES = $(am__append_19) $(am__append_24) $(am__append_32) \
        $(am__append_37) $(am__append_49) $(am__append_58) \
        $(am__append_64) $(am__append_75) $(am__append_94) \
-       $(am__append_103) $(am__append_109) $(am__append_118) \
-       $(am__append_123)
+       $(am__append_104) $(am__append_110) $(am__append_119) \
+       $(am__append_124)
 CLEANFILES = common/version.c common/version.c-stamp \
        testsuite/common/bits-gen testsuite/common/bits32m0.c \
        testsuite/common/bits32m31.c testsuite/common/bits64m0.c \
@@ -1654,8 +1675,8 @@ MOSTLYCLEANFILES = core $(common_HW_CONFIG_H_TARGETS) $(patsubst \
        $(am__append_27) $(am__append_34) $(am__append_40) \
        $(am__append_51) $(am__append_60) $(am__append_66) \
        $(am__append_71) $(am__append_77) $(am__append_83) \
-       $(am__append_99) $(am__append_105) $(am__append_111) \
-       $(am__append_121) $(am__append_125)
+       $(am__append_99) $(am__append_106) $(am__append_112) \
+       $(am__append_122) $(am__append_126)
 AM_CFLAGS = $(WERROR_CFLAGS) $(WARN_CFLAGS)
 AM_CPPFLAGS = $(INCGNU) -I$(srcroot)/include -I../bfd -I.. \
        $(SIM_HW_CFLAGS) $(SIM_INLINE) -I$(srcdir)/common \
@@ -1670,8 +1691,8 @@ SIM_ALL_RECURSIVE_DEPS = common/libcommon.a \
        $(am__append_33) $(am__append_38) $(am__append_50) \
        $(am__append_59) $(am__append_65) $(am__append_69) \
        $(am__append_76) $(am__append_81) $(am__append_98) \
-       $(am__append_104) $(am__append_110) $(am__append_119) \
-       $(am__append_124)
+       $(am__append_105) $(am__append_111) $(am__append_120) \
+       $(am__append_125)
 SIM_INSTALL_DATA_LOCAL_DEPS = 
 SIM_INSTALL_EXEC_LOCAL_DEPS = $(am__append_43)
 SIM_UNINSTALL_LOCAL_DEPS = $(am__append_44)
@@ -2493,6 +2514,24 @@ testsuite_common_CPPFLAGS = \
 @SIM_ENABLE_ARCH_mips_TRUE@mips_M16_DC = $(srcdir)/mips/m16.dc
 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS32_DC = $(srcdir)/mips/micromips.dc
 @SIM_ENABLE_ARCH_mips_TRUE@mips_MICROMIPS16_DC = $(srcdir)/mips/micromips16.dc
+@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_SOURCES = 
+@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_libsim_a_LIBADD = \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(common_libcommon_a_OBJECTS) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/%,$(SIM_NEW_COMMON_OBJS)) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(SIM_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(patsubst %,mn10300/dv-%.o,$(mn10300_SIM_EXTRA_HW_DEVICES)) \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/interp.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/modules.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/op_utils.o \
+@SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/sim-resume.o
+
 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_SOURCES = 
 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_run_LDADD = \
 @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/nrun.o \
@@ -3054,6 +3093,14 @@ mips/libsim.a: $(mips_libsim_a_OBJECTS) $(mips_libsim_a_DEPENDENCIES) $(EXTRA_mi
        $(AM_V_at)-rm -f mips/libsim.a
        $(AM_V_AR)$(mips_libsim_a_AR) mips/libsim.a $(mips_libsim_a_OBJECTS) $(mips_libsim_a_LIBADD)
        $(AM_V_at)$(RANLIB) mips/libsim.a
+mn10300/$(am__dirstamp):
+       @$(MKDIR_P) mn10300
+       @: > mn10300/$(am__dirstamp)
+
+mn10300/libsim.a: $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_DEPENDENCIES) $(EXTRA_mn10300_libsim_a_DEPENDENCIES) mn10300/$(am__dirstamp)
+       $(AM_V_at)-rm -f mn10300/libsim.a
+       $(AM_V_AR)$(mn10300_libsim_a_AR) mn10300/libsim.a $(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD)
+       $(AM_V_at)$(RANLIB) mn10300/libsim.a
 
 clean-checkPROGRAMS:
        @list='$(check_PROGRAMS)'; test -n "$$list" || exit 0; \
@@ -3240,9 +3287,6 @@ microblaze/run$(EXEEXT): $(microblaze_run_OBJECTS) $(microblaze_run_DEPENDENCIES
 mips/run$(EXEEXT): $(mips_run_OBJECTS) $(mips_run_DEPENDENCIES) $(EXTRA_mips_run_DEPENDENCIES) mips/$(am__dirstamp)
        @rm -f mips/run$(EXEEXT)
        $(AM_V_CCLD)$(LINK) $(mips_run_OBJECTS) $(mips_run_LDADD) $(LIBS)
-mn10300/$(am__dirstamp):
-       @$(MKDIR_P) mn10300
-       @: > mn10300/$(am__dirstamp)
 
 mn10300/run$(EXEEXT): $(mn10300_run_OBJECTS) $(mn10300_run_DEPENDENCIES) $(EXTRA_mn10300_run_DEPENDENCIES) mn10300/$(am__dirstamp)
        @rm -f mn10300/run$(EXEEXT)
@@ -4965,6 +5009,13 @@ testsuite/common/bits64m63.c: testsuite/common/bits-gen$(EXEEXT) testsuite/commo
 @SIM_ENABLE_ARCH_mips_TRUE@      esac \
 @SIM_ENABLE_ARCH_mips_TRUE@    done
 @SIM_ENABLE_ARCH_mips_TRUE@    $(AM_V_at)touch $@
+@SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_libsim_a_OBJECTS) $(mn10300_libsim_a_LIBADD): mn10300/hw-config.h
+
+@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: mn10300/%.c
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+@SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/%.o: common/%.c
+@SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
 @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/modules.c: | $(mn10300_BUILD_OUTPUTS)
 
 @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen
index a96cb56a50d2a76747a6a231bef461fe7f42f8b4..511d6b5824b7d6211e095500e8a7f72f6b567270 100644 (file)
 
 arch = mn10300
 
-MN10300_OBJS = \
-       itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \
-       $(SIM_NEW_COMMON_OBJS) \
-       op_utils.o \
-       sim-resume.o
-
-SIM_OBJS = $(MN10300_OBJS) interp.o
+SIM_LIBSIM =
 
 # List of extra flags to always pass to $(CC).
 SIM_EXTRA_CFLAGS = \
index d24e6b8d04055cc6f7430698869ba06ede11bf3b..06b42087699abb4151e36036af2db53880abad13 100644 (file)
 ## You should have received a copy of the GNU General Public License
 ## along with this program.  If not, see <http://www.gnu.org/licenses/>.
 
+%C%_libsim_a_SOURCES =
+%C%_libsim_a_LIBADD = \
+       $(common_libcommon_a_OBJECTS) \
+       %D%/itable.o \
+       %D%/semantics.o \
+       %D%/idecode.o \
+       %D%/icache.o \
+       %D%/engine.o \
+       %D%/irun.o \
+       %D%/support.o \
+       $(patsubst %,%D%/%,$(SIM_NEW_COMMON_OBJS)) \
+       $(patsubst %,%D%/dv-%.o,$(SIM_HW_DEVICES)) \
+       $(patsubst %,%D%/dv-%.o,$(%C%_SIM_EXTRA_HW_DEVICES)) \
+       %D%/interp.o \
+       %D%/modules.o \
+       %D%/op_utils.o \
+       %D%/sim-resume.o
+$(%C%_libsim_a_OBJECTS) $(%C%_libsim_a_LIBADD): %D%/hw-config.h
+
+noinst_LIBRARIES += %D%/libsim.a
+
+%D%/%.o: %D%/%.c
+       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
+%D%/%.o: common/%.c
+       $(AM_V_at)$(MAKE) $(AM_MAKEFLAGS) -C $(@D) $(@F)
+
 %C%_run_SOURCES =
 %C%_run_LDADD = \
        %D%/nrun.o \