+2007-05-31 Markus Deuling <deuling@de.ibm.com>
+
+ * xtensa-tdep.c (XTENSA_IS_ENTRY, extract_call_winsize)
+ (xtensa_register_write_masked, xtensa_register_read_masked)
+ (xtensa_extract_return_value, xtensa_store_return_value
+ (xtensa_push_dummy_call, xtensa_breakpoint_from_pc): Replace
+ TARGET_BYTE_ORDER by gdbarch_byte_order.
+ * sh-tdep.c (sh_breakpoint_from_pc, gdb_print_insn_sh)
+ (sh_justify_value_in_reg, sh_next_flt_argreg, sh_push_dummy_call_fpu)
+ (sh_extract_return_value_fpu, sh_store_return_value_fpu): Likewise.
+ * sh64-tdep.c (sh64_breakpoint_from_pc, gdb_print_insn_sh64)
+ (sh64_push_dummy_call, sh64_extract_return_value)
+ (sh64_store_return_value, sh64_register_convert_to_virtual)
+ (sh64_register_convert_to_raw, sh64_pseudo_register_read)
+ (sh64_pseudo_register_write, sh64_do_fp_register)
+ (sh64_frame_prev_register): Likewise.
+ * score-tdep.c (score_print_insn, score_breakpoint_from_pc)
+ (score_return_value, score_push_dummy_call, score_fetch_inst): Likewise.
+ * rs6000-tdep.c (rs6000_breakpoint_from_pc, rs6000_push_dummy_call)
+ (e500_move_ev_register,gdb_print_insn_powerpc): Likewise.
+ * remote-m32r-sdi.c (m32r_resume, m32r_wait): Likewise.
+ * ppc-linux-nat.c (store_register): Likewise.
+ * nto-tdep.c (nto_find_and_open_solib)
+ (nto_init_solib_absolute_prefix): Likewise.
+ * mips-tdep.c (mips_pseudo_register_read, mips_pseudo_register_write)
+ (mips_convert_register_p, mips_eabi_push_dummy_call)
+ (mips_n32n64_push_dummy_call, mips_n32n64_return_value)
+ (mips_o32_push_dummy_call, mips_o32_return_value)
+ (mips_o64_push_dummy_call, mips_o64_return_value, mips_o64_return_value)
+ (mips_read_fp_register_single, mips_read_fp_register_double)
+ (mips_print_register, print_gp_register_row, gdb_print_insn_mips)
+ (mips_breakpoint_from_pc): Likewise.
+ * mipsnbsd-tdep.c (mipsnbsd_sigtramp_offset): Likewise.
+ * mips-linux-tdep.c (mips64_supply_fpregset, mips64_fill_fpregset)
+ (mips_linux_o32_sigframe_init): Likewise.
+ * m32r-tdep.c (m32r_memory_insert_breakpoint)
+ (m32r_memory_remove_breakpoint, m32r_breakpoint_from_pc): Likewise.
+ * libunwind-frame.c (libunwind_frame_cache, libunwind_frame_sniffer)
+ (libunwind_sigtramp_frame_sniffer, libunwind_get_reg_special): Likewise.
+ * iq2000-tdep.c (iq2000_breakpoint_from_pc): Likewise.
+ * coffread.c (process_coff_symbol): Likewise.
+ * arm-tdep.c (convert_from_extended, convert_to_extended)
+ (gdb_print_insn_arm): Likewise.
+
2007-05-31 Markus Deuling <deuling@de.ibm.com>
* gdbarch.sh (NUM_REGS): Replace by gdbarch_num_regs.
void *dbl)
{
DOUBLEST d;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
floatformat_to_doublest (&floatformat_arm_ext_big, ptr, &d);
else
floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword,
{
DOUBLEST d;
floatformat_to_doublest (fmt, ptr, &d);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
floatformat_from_doublest (&floatformat_arm_ext_big, &d, dbl);
else
floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword,
else
info->symbols = NULL;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
return print_insn_big_arm (memaddr, info);
else
return print_insn_little_arm (memaddr, info);
SYMBOL_CLASS (sym) = LOC_ARG;
add_symbol_to_list (sym, &local_symbols);
#if !defined (BELIEVE_PCC_PROMOTION)
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
/* If PCC says a parameter is a short or a char,
aligned on an int boundary, realign it to the
(long) *pcptr);
*lenptr = 4;
- return (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) ? big_breakpoint
+ return (gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG) ? big_breakpoint
: little_breakpoint;
}
descr = libunwind_descr (get_frame_arch (next_frame));
acc = descr->accessors;
as = unw_create_addr_space_p (acc,
- TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG
? __BIG_ENDIAN
: __LITTLE_ENDIAN);
descr = libunwind_descr (get_frame_arch (next_frame));
acc = descr->accessors;
as = unw_create_addr_space_p (acc,
- TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG
? __BIG_ENDIAN
: __LITTLE_ENDIAN);
descr = libunwind_descr (get_frame_arch (next_frame));
acc = descr->accessors;
as = unw_create_addr_space_p (acc,
- TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG
? __BIG_ENDIAN
: __LITTLE_ENDIAN);
descr = libunwind_descr (gdbarch);
acc = descr->special_accessors;
as = unw_create_addr_space_p (acc,
- TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG
? __BIG_ENDIAN
: __LITTLE_ENDIAN);
bp_tgt->placed_size = bp_tgt->shadow_len = 4;
/* Determine appropriate breakpoint contents and size for this address. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((addr & 3) == 0)
{
buf[3] = contents_cache[3];
/* Remove parallel bit. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((buf[0] & 0x80) == 0 && (buf[2] & 0x80) != 0)
buf[2] &= 0x7f;
gdb_byte *bp;
/* Determine appropriate breakpoint. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((*pcptr & 3) == 0)
{
for (regi = 0; regi < 32; regi++)
{
const gdb_byte *reg_ptr = (const gdb_byte *)(*fpregsetp + (regi & ~1));
- if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
+ if ((gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG) != (regi & 1))
reg_ptr += 4;
regcache_raw_supply (regcache, FP0_REGNUM + regi, reg_ptr);
}
int regi = regno - FP0_REGNUM;
to = (gdb_byte *) (*fpregsetp + (regi & ~1));
- if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (regi & 1))
+ if ((gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG) != (regi & 1))
to += 4;
regcache_raw_collect (regcache, regno, to);
}
per-frame basis, but right now we don't; the kernel saves eight
bytes but we only want four. Use regs_base to access any
64-bit fields. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
regs_base = sigcontext_base + 4;
else
regs_base = sigcontext_base;
layout, since we can't tell, and it's much more common. Which bits are
the "high" bits depends on endianness. */
for (ireg = 0; ireg < 32; ireg++)
- if ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) != (ireg & 1))
+ if ((gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) != (ireg & 1))
trad_frame_set_reg_addr (this_cache,
ireg + regs->fp0 +
gdbarch_num_regs (current_gdbarch),
register_size (gdbarch, cookednum))
{
if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p
- || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_read_part (regcache, rawnum, 0, 4, buf);
else
regcache_raw_read_part (regcache, rawnum, 4, 4, buf);
register_size (gdbarch, cookednum))
{
if (gdbarch_tdep (gdbarch)->mips64_transfers_32bit_regs_p
- || TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ || gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write_part (regcache, rawnum, 0, 4, buf);
else
regcache_raw_write_part (regcache, rawnum, 4, 4, buf);
static int
mips_convert_register_p (int regnum, struct type *type)
{
- return (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ return (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
&& register_size (current_gdbarch, regnum) == 4
&& (regnum % gdbarch_num_regs (current_gdbarch))
>= mips_regnum (current_gdbarch)->fp0
making the ABI determination. */
if (len == 8 && mips_abi (gdbarch) == MIPS_ABI_EABI32)
{
- int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
+ int low_offset = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
/* Write the low word of the double to the even register(s). */
int longword_offset = 0;
CORE_ADDR addr;
stack_used_p = 1;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if (regsize == 8
&& (typecode == TYPE_CODE_INT
int longword_offset = 0;
CORE_ADDR addr;
stack_used_p = 1;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
It does not seem to be necessary to do the
same for integral types. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
&& partial_len < MIPS64_REGSIZE
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION))
mips_xfer_register (regcache,
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0,
- 8, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ 8, gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 0);
mips_xfer_register (regcache,
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0 + 2,
- 8, TARGET_BYTE_ORDER, readbuf ? readbuf + 8 : readbuf,
+ 8, gdbarch_byte_order (current_gdbarch),
+ readbuf ? readbuf + 8 : readbuf,
writebuf ? writebuf + 8 : writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
}
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0,
TYPE_LENGTH (type),
- TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
}
else if (TYPE_CODE (type) == TYPE_CODE_STRUCT
mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ regnum,
TYPE_LENGTH (TYPE_FIELD_TYPE (type, field)),
- TARGET_BYTE_ORDER, readbuf, writebuf, offset);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
offset, xfer, regnum);
mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ regnum, xfer,
- TARGET_BYTE_ORDER, readbuf, writebuf, offset);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
{
if (register_size (gdbarch, float_argreg) < 8 && len == 8)
{
- int low_offset = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? 4 : 0;
+ int low_offset = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? 4 : 0;
unsigned long regval;
/* Write the low word of the double to the even register(s). */
identified as such and GDB gets tweaked
accordingly. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
&& partial_len < MIPS32_REGSIZE
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION))
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0,
TYPE_LENGTH (type),
- TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
}
else if (TYPE_CODE (type) == TYPE_CODE_FLT
FP0. */
if (mips_debug)
fprintf_unfiltered (gdb_stderr, "Return float in $fp1/$fp0\n");
- switch (TARGET_BYTE_ORDER)
+ switch (gdbarch_byte_order (current_gdbarch))
{
case BFD_ENDIAN_LITTLE:
mips_xfer_register (regcache,
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0 +
- 0, 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ 0, 4, gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 0);
mips_xfer_register (regcache,
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0 + 1,
- 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
+ 4, gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 4);
break;
case BFD_ENDIAN_BIG:
mips_xfer_register (regcache,
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0 + 1,
- 4, TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ 4, gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 0);
mips_xfer_register (regcache,
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0 + 0,
- 4, TARGET_BYTE_ORDER, readbuf, writebuf, 4);
+ 4, gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 4);
break;
default:
internal_error (__FILE__, __LINE__, _("bad switch"));
mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ regnum,
TYPE_LENGTH (TYPE_FIELD_TYPE (type, field)),
- TARGET_BYTE_ORDER, readbuf, writebuf, offset);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
offset, xfer, regnum);
mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ regnum, xfer,
- TARGET_BYTE_ORDER, readbuf, writebuf, offset);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
int longword_offset = 0;
CORE_ADDR addr;
stack_used_p = 1;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((typecode == TYPE_CODE_INT
|| typecode == TYPE_CODE_PTR
It does not seem to be necessary to do the
same for integral types. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
&& partial_len < MIPS64_REGSIZE
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION))
gdbarch_num_regs (current_gdbarch)
+ mips_regnum (current_gdbarch)->fp0,
TYPE_LENGTH (type),
- TARGET_BYTE_ORDER, readbuf, writebuf, 0);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, 0);
return RETURN_VALUE_REGISTER_CONVENTION;
}
else
offset, xfer, regnum);
mips_xfer_register (regcache, gdbarch_num_regs (current_gdbarch)
+ regnum, xfer,
- TARGET_BYTE_ORDER, readbuf, writebuf, offset);
+ gdbarch_byte_order (current_gdbarch),
+ readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
32 bits. */
int offset;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
else
offset = 0;
/* mips_read_fp_register_single will find the correct 32 bits from
each register. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
mips_read_fp_register_single (frame, regno, rare_buffer + 4);
mips_read_fp_register_single (frame, regno + 1, rare_buffer);
else
fprintf_filtered (file, ": ");
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset =
register_size (current_gdbarch,
regnum) - register_size (current_gdbarch, regnum);
- register_size (current_gdbarch, regnum)); byte++)
printf_filtered (" ");
/* Now print the register value in hex, endian order. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (byte =
register_size (current_gdbarch,
regnum) - register_size (current_gdbarch, regnum);
info->disassembler_options = "gpr-names=32";
/* Call the appropriate disassembler based on the target endian-ness. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
return print_insn_big_mips (memaddr, info);
else
return print_insn_little_mips (memaddr, info);
static const gdb_byte *
mips_breakpoint_from_pc (CORE_ADDR *pcptr, int *lenptr)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if (mips_pc_is_mips16 (*pcptr))
{
mipsnbsd_sigtramp_offset (struct frame_info *next_frame)
{
CORE_ADDR pc = frame_pc_unwind (next_frame);
- const char *retcode = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
- ? sigtramp_retcode_mipseb : sigtramp_retcode_mipsel;
+ const char *retcode = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? sigtramp_retcode_mipseb :
+ sigtramp_retcode_mipsel;
unsigned char ret[RETCODE_SIZE], w[4];
LONGEST off;
int i;
else
{
arch = TARGET_ARCHITECTURE->arch_name;
- endian = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? "be" : "le";
+ endian = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? "be" : "le";
}
/* In case nto_root is short, add strlen(solib)
else
{
arch = TARGET_ARCHITECTURE->arch_name;
- endian = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? "be" : "le";
+ endian = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? "be" : "le";
}
sprintf (arch_path, "%s/%s%s", nto_root, arch, endian);
memset (buf, 0, sizeof buf);
bytes_to_transfer = align_up (register_size (current_gdbarch, regno),
sizeof (long));
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
{
/* Little-endian values always sit at the left end of the buffer. */
regcache_raw_collect (regcache, regno, buf);
}
- else if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
/* Big-endian values sit at the right end of the buffer. */
size_t padding = (bytes_to_transfer
else
{
buf[0] = SDI_WRITE_MEMORY;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
store_long_parameter (buf + 1, pc_addr);
else
store_long_parameter (buf + 1, pc_addr - 1);
continue;
/* Set PBP. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
send_three_arg_cmd (SDI_WRITE_MEMORY, 0xffff8000 + 4 * i, 4,
0x00000006);
else
store_long_parameter (buf + 5, 4);
if ((bp_addr & 2) == 0 && bp_addr != (pc_addr & 0xfffffffc))
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
buf[9] = dbt_bp_entry[0];
buf[10] = dbt_bp_entry[1];
}
else
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((bp_addr & 2) == 0)
{
continue;
/* DBC register */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
switch (ab_type[i])
{
if (last_pc_addr != 0xffffffff)
{
buf[0] = SDI_WRITE_MEMORY;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
store_long_parameter (buf + 1, last_pc_addr);
else
store_long_parameter (buf + 1, last_pc_addr - 1);
address, we have to take care of it later. */
if ((pc_addr & 0x2) != 0)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((bp_data[i][2] & 0x80) != 0)
{
c = serial_readchar (sdi_desc, SDI_TIMEOUT);
if (c != '-' && recv_data (buf, 4) != -1)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if ((buf[3] & 0x1) == 0x1)
hit_watchpoint_addr = ab_address[i];
static unsigned char big_breakpoint[] = { 0x7d, 0x82, 0x10, 0x08 };
static unsigned char little_breakpoint[] = { 0x08, 0x10, 0x82, 0x7d };
*bp_size = 4;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
return big_breakpoint;
else
return little_breakpoint;
else
{
/* Argument can fit in one register. No problem. */
- int adj = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? reg_size - len : 0;
+ int adj = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? reg_size - len : 0;
gdb_byte word[MAX_REGISTER_SIZE];
memset (word, 0, reg_size);
reg_index = ev_reg - tdep->ppc_ev0_regnum;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
move (regcache, tdep->ppc_ev0_upper_regnum + reg_index, byte_buffer);
move (regcache, tdep->ppc_gp0_regnum + reg_index, byte_buffer + 4);
if (!info->disassembler_options)
info->disassembler_options = "any";
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
return print_insn_big_powerpc (memaddr, info);
else
return print_insn_little_powerpc (memaddr, info);
static int
score_print_insn (bfd_vma memaddr, struct disassemble_info *info)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
return print_insn_big_score (memaddr, info);
else
return print_insn_little_score (memaddr, info);
}
raw = extract_unsigned_integer (buf, SCORE_INSTLEN);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if (!(raw & 0x80008000))
{
int xfer = SCORE_REGSIZE;
if (offset + xfer > TYPE_LENGTH (type))
xfer = TYPE_LENGTH (type) - offset;
- score_xfer_register (regcache, regnum, xfer, TARGET_BYTE_ORDER,
+ score_xfer_register (regcache, regnum, xfer,
+ gdbarch_byte_order (current_gdbarch),
readbuf, writebuf, offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
Where X is a hole. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION)
&& argreg > SCORE_LAST_ARG_REGNUM
ULONGEST regval = extract_unsigned_integer (val, partial_len);
/* The last part of a arg should shift left when
- TARGET_BYTE_ORDER is BFD_ENDIAN_BIG. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG
+ gdbarch_byte_order is BFD_ENDIAN_BIG. */
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG
&& arg_last_part_p == 1
&& (typecode == TYPE_CODE_STRUCT
|| typecode == TYPE_CODE_UNION))
inst.raw = extract_unsigned_integer (buf, SCORE_INSTLEN);
inst.is15 = !(inst.raw & 0x80008000);
inst.v = RM_PBITS (inst.raw);
- big = (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG);
+ big = (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG);
if (inst.is15)
{
if (big ^ ((addr & 0x2) == 2))
static unsigned char big_remote_breakpoint[] = { 0xc3, 0x20 };
static unsigned char little_remote_breakpoint[] = { 0x20, 0xc3 };
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (big_remote_breakpoint);
return big_remote_breakpoint;
static int
gdb_print_insn_sh (bfd_vma memaddr, disassemble_info * info)
{
- info->endian = TARGET_BYTE_ORDER;
+ info->endian = gdbarch_byte_order (current_gdbarch);
return print_insn_sh (memaddr, info);
}
if (len < 4)
{
/* value gets right-justified in the register or stack word */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
memcpy (valbuf + (4 - len), (char *) value_contents (val), len);
else
memcpy (valbuf, (char *) value_contents (val), len);
/* Also mark the next register as used. */
flt_argreg_array[argreg + 1] = 1;
}
- else if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ else if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
{
/* In little endian, gcc passes floats like this: f5, f4, f7, f6, ... */
if (!flt_argreg_array[argreg + 1])
register, increments the val and len values accordingly
and then proceeds as normal by writing the second 32 bits
into the next register. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE
&& TYPE_LENGTH (type) == 2 * reg_size)
{
regcache_cooked_write_unsigned (regcache, flt_argreg + 1,
int len = TYPE_LENGTH (type);
int i, regnum = FP0_REGNUM;
for (i = 0; i < len; i += 4)
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_read (regcache, regnum++, (char *) valbuf + len - 4 - i);
else
regcache_raw_read (regcache, regnum++, (char *) valbuf + i);
int len = TYPE_LENGTH (type);
int i, regnum = FP0_REGNUM;
for (i = 0; i < len; i += 4)
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
(char *) valbuf + len - 4 - i);
else
which translates in big endian mode to 0x0, 0x3b
and in little endian mode to 0x3b, 0x0*/
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
if (pc_is_isa32 (*pcptr))
{
static int
gdb_print_insn_sh64 (bfd_vma memaddr, disassemble_info *info)
{
- info->endian = TARGET_BYTE_ORDER;
+ info->endian = gdbarch_byte_order (current_gdbarch);
return print_insn_sh (memaddr, info);
}
if (len < argreg_size)
{
/* value gets right-justified in the register or stack word */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
memcpy (valbuf + argreg_size - len,
(char *) value_contents (args[argnum]), len);
else
regcache_cooked_read (regcache, DR0_REGNUM, buf);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
floatformat_to_doublest (&floatformat_ieee_double_littlebyte_bigword,
buf, &val);
else
at the most significant end. */
regcache_raw_read (regcache, DEFAULT_RETURN_REGNUM, buf);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = register_size (current_gdbarch, DEFAULT_RETURN_REGNUM)
- len;
else
{
int i, regnum = FP0_REGNUM;
for (i = 0; i < len; i += 4)
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
regcache_raw_write (regcache, regnum++,
(char *) valbuf + len - 4 - i);
else
{
/* Pad with zeros. */
memset (buf, 0, register_size (current_gdbarch, return_register));
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
offset = 0; /*register_size (current_gdbarch,
return_register) - len;*/
else
sh64_register_convert_to_virtual (int regnum, struct type *type,
char *from, char *to)
{
- if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) != BFD_ENDIAN_LITTLE)
{
/* It is a no-op. */
memcpy (to, from, register_size (current_gdbarch, regnum));
sh64_register_convert_to_raw (struct type *type, int regnum,
const void *from, void *to)
{
- if (TARGET_BYTE_ORDER != BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) != BFD_ENDIAN_LITTLE)
{
/* It is a no-op. */
memcpy (to, from, register_size (current_gdbarch, regnum));
/* Build the value in the provided buffer. */
regcache_raw_read (regcache, base_regnum, temp_buffer);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
memcpy (buffer, temp_buffer + offset, 4); /* get LOWER 32 bits only????*/
}
{
base_regnum = sh64_compact_reg_base_num (reg_nr);
/* reg_nr is 32 bit here, and base_regnum is 64 bits. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4;
else
offset = 0;
fprintf_filtered (file, "\t(raw 0x");
for (j = 0; j < register_size (gdbarch, regnum); j++)
{
- int idx = TARGET_BYTE_ORDER == BFD_ENDIAN_BIG ? j
- : register_size (gdbarch, regnum) - 1 - j;
+ int idx = gdbarch_byte_order (current_gdbarch)
+ == BFD_ENDIAN_BIG ? j : register_size
+ (gdbarch, regnum) - 1 - j;
fprintf_filtered (file, "%02x", raw_buffer[idx]);
}
fprintf_filtered (file, ")");
if (valuep)
{
memset (valuep, 0, reg_size);
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
read_memory (*addrp, valuep, size);
else
read_memory (*addrp, (char *) valuep + reg_size - size, size);
indicates that the instruction is an ENTRY instruction. */
#define XTENSA_IS_ENTRY(op1) \
- ((TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) ? ((op1) == 0x6c) : ((op1) == 0x36))
+ ((gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG) \
+ ? ((op1) == 0x6c) : ((op1) == 0x36))
#define XTENSA_ENTRY_LENGTH 3
/* Lookup call insn.
(Return the default value (4) if we can't find a valid call insn. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_LITTLE)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_LITTLE)
{
if (((insn & 0xf) == 0x5) || ((insn & 0xcf) == 0xc0))
winsize = (insn & 0x30) >> 2; /* 0, 4, 8, 12 */
DEBUGTRACE ("xtensa_register_write_masked ()\n");
/* Copy the masked register to host byte-order. */
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (i = 0; i < bytesize; i++)
{
mem >>= 8;
ptr = value;
mem = *ptr;
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
for (i = 0; i < bytesize; i++)
{
if ((i & 3) == 0)
DEBUGINFO ("[xtensa_extract_return_value] areg %d len %d\n", areg, len);
- if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4 - len;
for (; len > 0; len -= 4, areg++, valbuf += 4)
DEBUGTRACE ("[xtensa_store_return_value] callsize %d wb %d\n",
callsize, (int) wb);
- if (len < 4 && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (len < 4 && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset = 4 - len;
areg = AREG_NUMBER (A2_REGNUM + callsize, wb);
word in big-endian mode and require a shift. This only
applies for structures smaller than one word. */
- if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (n < REGISTER_SIZE
+ && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
offset += (REGISTER_SIZE - n);
write_memory (offset, info->contents, info->length);
than REGISTER_SIZE; for larger odd-sized structures the excess
will be left-aligned in the register on both endiannesses. */
- if (n < REGISTER_SIZE && TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (n < REGISTER_SIZE
+ && gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
ULONGEST v = extract_unsigned_integer (cp, REGISTER_SIZE);
v = v >> ((REGISTER_SIZE - n) * TARGET_CHAR_BIT);
if (ISA_USE_DENSITY_INSTRUCTIONS)
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (density_big_breakpoint);
return density_big_breakpoint;
}
else
{
- if (TARGET_BYTE_ORDER == BFD_ENDIAN_BIG)
+ if (gdbarch_byte_order (current_gdbarch) == BFD_ENDIAN_BIG)
{
*lenptr = sizeof (big_breakpoint);
return big_breakpoint;
projects / binutils-gdb.git / commitdiff