| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 0 | N VSSI_0 | |
+| 0 | N VSSE_0 | |
| 1 | N VDDE_0 | |
| 2 | N SDR_DQM0 | |
| 3 | N SDR_D0 | |
| 26 | N SDR_CASn | |
| 27 | N SDR_WEn | |
| 28 | N SDR_CSn0 | |
-| 30 | N VSSE_0 | |
+| 30 | N VSSI_0 | |
| 31 | N VDDI_0 | |
## Bank E (32 pins, width 2)
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
| 32 | E VSSE_1 | |
-| 33 | E SDR_AD10 | |
-| 34 | E SDR_AD11 | |
-| 35 | E SDR_AD12 | |
-| 36 | E SDR_DQM1 | |
-| 37 | E SDR_D8 | |
-| 38 | E SDR_D9 | |
-| 39 | E SDR_D10 | |
-| 40 | E SDR_D11 | |
-| 41 | E SDR_D12 | |
-| 42 | E SDR_D13 | |
-| 43 | E SDR_D14 | |
-| 44 | E SDR_D15 | |
-| 45 | E VDDE_1 | |
+| 33 | E VDDE_1 | |
+| 34 | E SDR_AD10 | |
+| 35 | E SDR_AD11 | |
+| 36 | E SDR_AD12 | |
+| 37 | E SDR_DQM1 | |
+| 38 | E SDR_D8 | |
+| 39 | E SDR_D9 | |
+| 40 | E SDR_D10 | |
+| 41 | E SDR_D11 | |
+| 42 | E SDR_D12 | |
+| 43 | E SDR_D13 | |
+| 44 | E SDR_D14 | |
+| 45 | E SDR_D15 | |
| 46 | E GPIOE_E8 | |
| 47 | E GPIOE_E9 | |
| 48 | E GPIOE_E10 | |
| 51 | E GPIOE_E13 | |
| 52 | E GPIOE_E14 | |
| 53 | E GPIOE_E15 | |
-| 55 | E VSSI_1 | |
-| 56 | E JTAG_TMS | |
-| 57 | E JTAG_TDI | |
-| 58 | E JTAG_TDO | |
-| 59 | E JTAG_TCK | |
+| 55 | E JTAG_TMS | |
+| 56 | E JTAG_TDI | |
+| 57 | E JTAG_TDO | |
+| 58 | E JTAG_TCK | |
+| 62 | E VSSI_1 | |
| 63 | E VDDI_1 | |
## Bank S (32 pins, width 2)
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 64 | S VSSI_2 | |
-| 65 | S SYS_CLK | |
-| 66 | S SYS_RST | |
-| 67 | S SYS_PLLCLK | |
-| 68 | S SYS_PLLOUT | |
-| 69 | S SYS_CSEL0 | |
-| 70 | S SYS_CSEL1 | |
-| 71 | S SYS_CSEL2 | |
+| 64 | S SYS_CLK | |
+| 65 | S SYS_RST | |
+| 66 | S SYS_PLLCLK | |
+| 67 | S SYS_PLLOUT | |
+| 68 | S SYS_CSEL0 | |
+| 69 | S SYS_CSEL1 | |
+| 70 | S SYS_CSEL2 | |
+| 71 | S VSSI_2 | |
| 72 | S VDDI_2 | |
| 73 | S MTWI_SDA | |
| 74 | S MTWI_SCL | |
| 82 | S MSPI0_MISO | |
| 84 | S UART0_TX | |
| 85 | S UART0_RX | |
-| 86 | S VSSI_3 | |
-| 87 | S GPIOS_S0 | |
-| 88 | S GPIOS_S1 | |
-| 89 | S GPIOS_S2 | |
-| 90 | S GPIOS_S3 | |
-| 91 | S GPIOS_S4 | |
-| 92 | S GPIOS_S5 | |
-| 93 | S GPIOS_S6 | |
-| 94 | S GPIOS_S7 | |
+| 86 | S GPIOS_S0 | |
+| 87 | S GPIOS_S1 | |
+| 88 | S GPIOS_S2 | |
+| 89 | S GPIOS_S3 | |
+| 90 | S GPIOS_S4 | |
+| 91 | S GPIOS_S5 | |
+| 92 | S GPIOS_S6 | |
+| 93 | S GPIOS_S7 | |
+| 94 | S VSSI_3 | |
| 95 | S VDDI_3 | |
## Bank W (32 pins, width 2)
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 96 | W VSSI_4 | |
-| 97 | W PWM_0 | |
-| 98 | W PWM_1 | |
-| 99 | W EINT_0 | |
-| 100 | W EINT_1 | |
-| 101 | W EINT_2 | |
-| 102 | W MSPI1_CK | |
-| 103 | W MSPI1_NSS | |
-| 104 | W MSPI1_MOSI | |
-| 105 | W MSPI1_MISO | |
-| 106 | W VDDE_2 | |
+| 96 | W VSSE_4 | |
+| 97 | W VDDE_2 | |
+| 98 | W PWM_0 | |
+| 99 | W PWM_1 | |
+| 100 | W EINT_0 | |
+| 101 | W EINT_1 | |
+| 102 | W EINT_2 | |
+| 103 | W MSPI1_CK | |
+| 104 | W MSPI1_NSS | |
+| 105 | W MSPI1_MOSI | |
+| 106 | W MSPI1_MISO | |
| 107 | W SD0_CMD | |
| 108 | W SD0_CLK | |
| 109 | W SD0_D0 | |
| 110 | W SD0_D1 | |
| 111 | W SD0_D2 | |
| 112 | W SD0_D3 | |
-| 113 | W VSSE_2 | |
+| 126 | W VSSI_2 | |
| 127 | W VDDI_4 | |
# Pinouts (Fixed function)
External Interrupt
-* EINT_0 : W3/0
-* EINT_1 : W4/0
-* EINT_2 : W5/0
+* EINT_0 : W4/0
+* EINT_1 : W5/0
+* EINT_2 : W6/0
## GPIO
* GPIOE_E15 : E21/0
* GPIOE_E8 : E14/0
* GPIOE_E9 : E15/0
-* GPIOS_S0 : S23/0
-* GPIOS_S1 : S24/0
-* GPIOS_S2 : S25/0
-* GPIOS_S3 : S26/0
-* GPIOS_S4 : S27/0
-* GPIOS_S5 : S28/0
-* GPIOS_S6 : S29/0
-* GPIOS_S7 : S30/0
+* GPIOS_S0 : S22/0
+* GPIOS_S1 : S23/0
+* GPIOS_S2 : S24/0
+* GPIOS_S3 : S25/0
+* GPIOS_S4 : S26/0
+* GPIOS_S5 : S27/0
+* GPIOS_S6 : S28/0
+* GPIOS_S7 : S29/0
## JTAG
JTAG
-* JTAG_TCK : E27/0
-* JTAG_TDI : E25/0
-* JTAG_TDO : E26/0
-* JTAG_TMS : E24/0
+* JTAG_TCK : E26/0
+* JTAG_TDI : E24/0
+* JTAG_TDO : E25/0
+* JTAG_TMS : E23/0
## MSPI0
SPI Master 2 (SDCard)
-* MSPI1_CK : W6/0
-* MSPI1_MISO : W9/0
-* MSPI1_MOSI : W8/0
-* MSPI1_NSS : W7/0
+* MSPI1_CK : W7/0
+* MSPI1_MISO : W10/0
+* MSPI1_MOSI : W9/0
+* MSPI1_NSS : W8/0
## MTWI
PWM
-* PWM_0 : W1/0
-* PWM_1 : W2/0
+* PWM_0 : W2/0
+* PWM_1 : W3/0
## SD0
* SDR_AD0 : N11/0
* SDR_AD1 : N12/0
-* SDR_AD10 : E1/0
-* SDR_AD11 : E2/0
-* SDR_AD12 : E3/0
+* SDR_AD10 : E2/0
+* SDR_AD11 : E3/0
+* SDR_AD12 : E4/0
* SDR_AD2 : N13/0
* SDR_AD3 : N14/0
* SDR_AD4 : N15/0
* SDR_CSn0 : N28/0
* SDR_D0 : N3/0
* SDR_D1 : N4/0
-* SDR_D10 : E7/0
-* SDR_D11 : E8/0
-* SDR_D12 : E9/0
-* SDR_D13 : E10/0
-* SDR_D14 : E11/0
-* SDR_D15 : E12/0
+* SDR_D10 : E8/0
+* SDR_D11 : E9/0
+* SDR_D12 : E10/0
+* SDR_D13 : E11/0
+* SDR_D14 : E12/0
+* SDR_D15 : E13/0
* SDR_D2 : N5/0
* SDR_D3 : N6/0
* SDR_D4 : N7/0
* SDR_D5 : N8/0
* SDR_D6 : N9/0
* SDR_D7 : N10/0
-* SDR_D8 : E5/0
-* SDR_D9 : E6/0
+* SDR_D8 : E6/0
+* SDR_D9 : E7/0
* SDR_DQM0 : N2/0
-* SDR_DQM1 : E4/0
+* SDR_DQM1 : E5/0
* SDR_RASn : N25/0
* SDR_WEn : N27/0
System Control
-* SYS_CLK : S1/0
-* SYS_CSEL0 : S5/0
-* SYS_CSEL1 : S6/0
-* SYS_CSEL2 : S7/0
-* SYS_PLLCLK : S3/0
-* SYS_PLLOUT : S4/0
-* SYS_RST : S2/0
+* SYS_CLK : S0/0
+* SYS_CSEL0 : S4/0
+* SYS_CSEL1 : S5/0
+* SYS_CSEL2 : S6/0
+* SYS_PLLCLK : S2/0
+* SYS_PLLOUT : S3/0
+* SYS_RST : S1/0
## UART0
Power
* VDDE_0 : N1/0
-* VDDE_1 : E13/0
-* VDDE_2 : W10/0
+* VDDE_1 : E1/0
+* VDDE_2 : W1/0
* VDDI_0 : N31/0
* VDDI_1 : E31/0
* VDDI_2 : S8/0
GND
-* VSSE_0 : N30/0
+* VSSE_0 : N0/0
* VSSE_1 : E0/0
-* VSSE_2 : W17/0
-* VSSI_0 : N0/0
-* VSSI_1 : E23/0
-* VSSI_2 : S0/0
-* VSSI_3 : S22/0
-* VSSI_4 : W0/0
+* VSSE_4 : W0/0
+* VSSI_0 : N30/0
+* VSSI_1 : E30/0
+* VSSI_2 : S7/0 W30/0
+* VSSI_3 : S30/0
# Pinmap for Libre-SOC 180nm
## GPIOS
-* GPIOS_S0 87 S23/0
-* GPIOS_S1 88 S24/0
-* GPIOS_S2 89 S25/0
-* GPIOS_S3 90 S26/0
-* GPIOS_S4 91 S27/0
-* GPIOS_S5 92 S28/0
-* GPIOS_S6 93 S29/0
-* GPIOS_S7 94 S30/0
+* GPIOS_S0 86 S22/0
+* GPIOS_S1 87 S23/0
+* GPIOS_S2 88 S24/0
+* GPIOS_S3 89 S25/0
+* GPIOS_S4 90 S26/0
+* GPIOS_S5 91 S27/0
+* GPIOS_S6 92 S28/0
+* GPIOS_S7 93 S29/0
## GPIOE
## JTAG
-* JTAG_TMS 56 E24/0
-* JTAG_TDI 57 E25/0
-* JTAG_TDO 58 E26/0
-* JTAG_TCK 59 E27/0
+* JTAG_TMS 55 E23/0
+* JTAG_TDI 56 E24/0
+* JTAG_TDO 57 E25/0
+* JTAG_TCK 58 E26/0
## PWM
-* PWM_0 97 W1/0
-* PWM_1 98 W2/0
+* PWM_0 98 W2/0
+* PWM_1 99 W3/0
## EINT
-* EINT_0 99 W3/0
-* EINT_1 100 W4/0
-* EINT_2 101 W5/0
+* EINT_0 100 W4/0
+* EINT_1 101 W5/0
+* EINT_2 102 W6/0
## VDD
* VDDE_0 1 N1/0
* VDDI_0 31 N31/0
-* VDDE_1 45 E13/0
+* VDDE_1 33 E1/0
## VSS
-* VSSI_0 0 N0/0
-* VSSE_0 30 N30/0
+* VSSE_0 0 N0/0
+* VSSI_0 30 N30/0
* VSSE_1 32 E0/0
## SYS
-* SYS_CLK 65 S1/0
-* SYS_RST 66 S2/0
-* SYS_PLLCLK 67 S3/0
-* SYS_PLLOUT 68 S4/0
-* SYS_CSEL0 69 S5/0
-* SYS_CSEL1 70 S6/0
-* SYS_CSEL2 71 S7/0
+* SYS_CLK 64 S0/0
+* SYS_RST 65 S1/0
+* SYS_PLLCLK 66 S2/0
+* SYS_PLLOUT 67 S3/0
+* SYS_CSEL0 68 S4/0
+* SYS_CSEL1 69 S5/0
+* SYS_CSEL2 70 S6/0
## MTWI
-* MSPI1_CK 102 W6/0
-* MSPI1_NSS 103 W7/0
-* MSPI1_MOSI 104 W8/0
-* MSPI1_MISO 105 W9/0
+* MSPI1_CK 103 W7/0
+* MSPI1_NSS 104 W8/0
+* MSPI1_MOSI 105 W9/0
+* MSPI1_MISO 106 W10/0
## SDR
* SDR_CASn 26 N26/0
* SDR_WEn 27 N27/0
* SDR_CSn0 28 N28/0
-* SDR_AD10 33 E1/0
-* SDR_AD11 34 E2/0
-* SDR_AD12 35 E3/0
-* SDR_DQM1 36 E4/0
-* SDR_D8 37 E5/0
-* SDR_D9 38 E6/0
-* SDR_D10 39 E7/0
-* SDR_D11 40 E8/0
-* SDR_D12 41 E9/0
-* SDR_D13 42 E10/0
-* SDR_D14 43 E11/0
-* SDR_D15 44 E12/0
+* SDR_AD10 34 E2/0
+* SDR_AD11 35 E3/0
+* SDR_AD12 36 E4/0
+* SDR_DQM1 37 E5/0
+* SDR_D8 38 E6/0
+* SDR_D9 39 E7/0
+* SDR_D10 40 E8/0
+* SDR_D11 41 E9/0
+* SDR_D12 42 E10/0
+* SDR_D13 43 E11/0
+* SDR_D14 44 E12/0
+* SDR_D15 45 E13/0
## Unused Pinouts (spare as GPIO) for 'Libre-SOC 180nm'
| Pin | Mux0 | Mux1 | Mux2 | Mux3 |
| --- | ----------- | ----------- | ----------- | ----------- |
-| 55 | E VSSI_1 | | | |
+| 62 | E VSSI_1 | | | |
| 63 | E VDDI_1 | | | |
-| 64 | S VSSI_2 | | | |
+| 71 | S VSSI_2 | | | |
| 72 | S VDDI_2 | | | |
-| 86 | S VSSI_3 | | | |
+| 94 | S VSSI_3 | | | |
| 95 | S VDDI_3 | | | |
-| 96 | W VSSI_4 | | | |
-| 106 | W VDDE_2 | | | |
-| 113 | W VSSE_2 | | | |
+| 96 | W VSSE_4 | | | |
+| 97 | W VDDE_2 | | | |
+| 126 | W VSSI_2 | | | |
| 127 | W VDDI_4 | | | |
# Reference Datasheets