bool process_qualifier_constant(struct _mesa_glsl_parse_state *state,
const char *qual_indentifier,
- unsigned *value, bool can_be_zero);
+ unsigned *value, bool can_be_zero,
+ bool must_match = false);
void merge_qualifier(ast_layout_expression *l_expr)
{
ast_layout_expression::process_qualifier_constant(struct _mesa_glsl_parse_state *state,
const char *qual_indentifier,
unsigned *value,
- bool can_be_zero)
+ bool can_be_zero,
+ bool must_match)
{
int min_value = 0;
bool first_pass = true;
* in a single declaration, the last occurrence overrides the
* former occurrence(s)."
*/
- if (!state->has_420pack() && !first_pass && *value != const_int->value.u[0]) {
- YYLTYPE loc = const_expression->get_location();
- _mesa_glsl_error(&loc, state, "%s layout qualifier does not "
- "match previous declaration (%d vs %d)",
- qual_indentifier, *value, const_int->value.i[0]);
- return false;
+ if (!first_pass) {
+ if ((must_match || !state->has_420pack()) && *value != const_int->value.u[0]) {
+ YYLTYPE loc = const_expression->get_location();
+ _mesa_glsl_error(&loc, state, "%s layout qualifier does not "
+ "match previous declaration (%d vs %d)",
+ qual_indentifier, *value, const_int->value.i[0]);
+ return false;
+ }
} else {
first_pass = false;
*value = const_int->value.u[0];
unsigned qual_max_vertices;
if (state->out_qualifier->max_vertices->
process_qualifier_constant(state, "max_vertices",
- &qual_max_vertices, true)) {
+ &qual_max_vertices, true, true)) {
if (qual_max_vertices > state->Const.MaxGeometryOutputVertices) {
YYLTYPE loc = state->out_qualifier->max_vertices->get_location();