uint16 addr,
const char *message);
-STATIC_INLINE address_word
+STATIC_INLINE UNUSED address_word
phys_to_virt (sim_cpu *cpu, address_word addr)
{
if (addr >= cpu->bank_start && addr < cpu->bank_end)
return (address_word) (addr);
}
-STATIC_INLINE uint8
+STATIC_INLINE UNUSED uint8
memory_read8 (sim_cpu *cpu, uint16 addr)
{
uint8 val;
return val;
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
memory_write8 (sim_cpu *cpu, uint16 addr, uint8 val)
{
if (sim_core_write_buffer (CPU_STATE (cpu), cpu, 0, &val, addr, 1) != 1)
}
}
-STATIC_INLINE uint16
+STATIC_INLINE UNUSED uint16
memory_read16 (sim_cpu *cpu, uint16 addr)
{
uint8 b[2];
return (((uint16) (b[0])) << 8) | ((uint16) b[1]);
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
memory_write16 (sim_cpu *cpu, uint16 addr, uint16 val)
{
uint8 b[2];
extern void
cpu_ccr_update_tst8 (sim_cpu *cpu, uint8 val);
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_tst16 (sim_cpu *cpu, uint16 val)
{
cpu_set_ccr_V (cpu, 0);
cpu_set_ccr_Z (cpu, val == 0 ? 1 : 0);
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_shift8 (sim_cpu *cpu, uint8 val)
{
cpu_set_ccr_N (cpu, val & 0x80 ? 1 : 0);
cpu_set_ccr_V (cpu, cpu_get_ccr_N (cpu) ^ cpu_get_ccr_C (cpu));
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_shift16 (sim_cpu *cpu, uint16 val)
{
cpu_set_ccr_N (cpu, val & 0x8000 ? 1 : 0);
cpu_set_ccr_V (cpu, cpu_get_ccr_N (cpu) ^ cpu_get_ccr_C (cpu));
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_add8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
{
cpu_set_ccr_C (cpu, ((a & b) | (b & ~r) | (a & ~r)) & 0x80 ? 1 : 0);
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_sub8 (sim_cpu *cpu, uint8 r, uint8 a, uint8 b)
{
cpu_set_ccr_C (cpu, ((~a & b) | (b & r) | (~a & r)) & 0x80 ? 1 : 0);
cpu_set_ccr_N (cpu, r & 0x80 ? 1 : 0);
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_add16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
{
cpu_set_ccr_C (cpu, ((a & b) | (b & ~r) | (a & ~r)) & 0x8000 ? 1 : 0);
cpu_set_ccr_N (cpu, r & 0x8000 ? 1 : 0);
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_ccr_update_sub16 (sim_cpu *cpu, uint16 r, uint16 a, uint16 b)
{
cpu_set_ccr_C (cpu, ((~a & b) | (b & r) | (~a & r)) & 0x8000 ? 1 : 0);
}
/* Push and pop instructions for 68HC11 (next-available stack mode). */
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_m68hc11_push_uint8 (sim_cpu *cpu, uint8 val)
{
uint16 addr = cpu->cpu_regs.sp;
cpu->cpu_regs.sp = addr - 1;
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_m68hc11_push_uint16 (sim_cpu *cpu, uint16 val)
{
uint16 addr = cpu->cpu_regs.sp - 1;
cpu->cpu_regs.sp = addr - 1;
}
-STATIC_INLINE uint8
+STATIC_INLINE UNUSED uint8
cpu_m68hc11_pop_uint8 (sim_cpu *cpu)
{
uint16 addr = cpu->cpu_regs.sp;
return val;
}
-STATIC_INLINE uint16
+STATIC_INLINE UNUSED uint16
cpu_m68hc11_pop_uint16 (sim_cpu *cpu)
{
uint16 addr = cpu->cpu_regs.sp;
}
/* Push and pop instructions for 68HC12 (last-used stack mode). */
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_m68hc12_push_uint8 (sim_cpu *cpu, uint8 val)
{
uint16 addr = cpu->cpu_regs.sp;
cpu->cpu_regs.sp = addr;
}
-STATIC_INLINE void
+STATIC_INLINE UNUSED void
cpu_m68hc12_push_uint16 (sim_cpu *cpu, uint16 val)
{
uint16 addr = cpu->cpu_regs.sp;
cpu->cpu_regs.sp = addr;
}
-STATIC_INLINE uint8
+STATIC_INLINE UNUSED uint8
cpu_m68hc12_pop_uint8 (sim_cpu *cpu)
{
uint16 addr = cpu->cpu_regs.sp;
return val;
}
-STATIC_INLINE uint16
+STATIC_INLINE UNUSED uint16
cpu_m68hc12_pop_uint16 (sim_cpu *cpu)
{
uint16 addr = cpu->cpu_regs.sp;
}
/* Fetch a 8/16 bit value and update the PC. */
-STATIC_INLINE uint8
+STATIC_INLINE UNUSED uint8
cpu_fetch8 (sim_cpu *cpu)
{
uint16 addr = cpu->cpu_regs.pc;
return val;
}
-STATIC_INLINE uint16
+STATIC_INLINE UNUSED uint16
cpu_fetch16 (sim_cpu *cpu)
{
uint16 addr = cpu->cpu_regs.pc;