radeonsi: support 64-bit system values

For simplicitly, always store system values as 32-bit values or arrays
of 32-bit values. 64-bit values are unpacked and packed accordingly.

Reviewed-by: Marek Olšák <marek.olsak@amd.com>

diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index 3e38f0d29acc7590f6c2c2c6106418296316fb30..3b8951cd942b493b9030f4f23caf6c15a45c0746 100644 (file)
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -762,13 +762,29 @@ static LLVMValueRef fetch_system_value(struct lp_build_tgsi_context *bld_base,
                                       unsigned swizzle)
 {
        struct si_shader_context *ctx = si_shader_context(bld_base);
-       struct gallivm_state *gallivm = &ctx->gallivm;
-
+       LLVMBuilderRef builder = ctx->gallivm.builder;
        LLVMValueRef cval = ctx->system_values[reg->Register.Index];
+
+       if (tgsi_type_is_64bit(type)) {
+               LLVMValueRef lo, hi;
+
+               assert(swizzle == 0 || swizzle == 2);
+
+               lo = LLVMBuildExtractElement(
+                       builder, cval, LLVMConstInt(ctx->i32, swizzle, 0), "");
+               hi = LLVMBuildExtractElement(
+                       builder, cval, LLVMConstInt(ctx->i32, swizzle + 1, 0), "");
+
+               return si_llvm_emit_fetch_64bit(bld_base, type, lo, hi);
+       }
+
        if (LLVMGetTypeKind(LLVMTypeOf(cval)) == LLVMVectorTypeKind) {
-               cval = LLVMBuildExtractElement(gallivm->builder, cval,
-                                              LLVMConstInt(ctx->i32, swizzle, 0), "");
+               cval = LLVMBuildExtractElement(
+                       builder, cval, LLVMConstInt(ctx->i32, swizzle, 0), "");
+       } else {
+               assert(swizzle == 0);
        }
+
        return bitcast(bld_base, type, cval);
 }