rwds_oe = "__________________________________________________________--------______"
rwds_o = "____________________________________________________________----________"
- #clk = "___--__--__--__--__--__--__--__--__--__--__--__--__--__--__--__--_______"
- #cs_n = "--________________________________________________________________------"
- #dq_oe = "__------------____________________________________________--------______"
- #dq_o = "002000048d000000000000000000000000000000000000000000000000deadbeef000000"
- #rwds_oe = "__________________________________________________________--------______"
- #rwds_o = "________________________________________________________________________"
for i in range(3):
yield
if False: # useful for printing out expected vs results
run_simulation(dut, [fpga_gen(dut), hyperram_gen(dut)],
vcd_name="rd_sim.vcd")
+
class TestHyperBusRead(unittest.TestCase):
def test_hyperram_read(self):
def fpga_gen(dut):