radv: add support for Vega12

Based on RadeonSI. Untested.

Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>

diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
index 9c82fd059f8c20808a70cc818d63f0030782e032..81f31f6c6d38978fecde59b6bff4f18034f3ba1c 100644 (file)
--- a/src/amd/vulkan/radv_device.c
+++ b/src/amd/vulkan/radv_device.c
@@ -101,6 +101,7 @@ radv_get_device_name(enum radeon_family family, char *name, size_t name_len)
        case CHIP_POLARIS12: chip_string = "AMD RADV POLARIS12"; break;
        case CHIP_STONEY: chip_string = "AMD RADV STONEY"; break;
        case CHIP_VEGA10: chip_string = "AMD RADV VEGA"; break;
+       case CHIP_VEGA12: chip_string = "AMD RADV VEGA12"; break;
        case CHIP_RAVEN: chip_string = "AMD RADV RAVEN"; break;
        default: chip_string = "AMD RADV unknown"; break;
        }
@@ -290,7 +291,8 @@ radv_physical_device_init(struct radv_physical_device *device,
        if (device->rad_info.family == CHIP_STONEY ||
            device->rad_info.chip_class >= GFX9) {
                device->has_rbplus = true;
-               device->rbplus_allowed = device->rad_info.family == CHIP_STONEY;
+               device->rbplus_allowed = device->rad_info.family == CHIP_STONEY ||
+                                        device->rad_info.family == CHIP_VEGA12;
        }
 
        /* The mere presense of CLEAR_STATE in the IB causes random GPU hangs
@@ -1174,6 +1176,7 @@ radv_device_init_gs_info(struct radv_device *device)
        case CHIP_POLARIS11:
        case CHIP_POLARIS12:
        case CHIP_VEGA10:
+       case CHIP_VEGA12:
        case CHIP_RAVEN:
                device->gs_table_depth = 32;
                return;

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index dd5baec117355596f3b419d8e2c67564407b902c..af1ea395d361b150da6e1a27c0c45b5cbd98cba8 100644 (file)
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -2155,6 +2155,7 @@ radv_pipeline_generate_binning_state(struct radeon_winsys_cs *cs,
 
        switch (pipeline->device->physical_device->rad_info.family) {
        case CHIP_VEGA10:
+       case CHIP_VEGA12:
                context_states_per_bin = 1;
                persistent_states_per_bin = 1;
                fpovs_per_batch = 63;

diff --git a/src/amd/vulkan/si_cmd_buffer.c b/src/amd/vulkan/si_cmd_buffer.c
index 06e8442100a9355107c0e656d5fcffdcbb6133dd..0970eff1039367f7beecdee7d95457ad8bd477ef 100644 (file)
--- a/src/amd/vulkan/si_cmd_buffer.c
+++ b/src/amd/vulkan/si_cmd_buffer.c
@@ -509,6 +509,7 @@ si_emit_config(struct radv_physical_device *physical_device,
 
                switch (physical_device->rad_info.family) {
                case CHIP_VEGA10:
+               case CHIP_VEGA12:
                        pc_lines = 4096;
                        break;
                case CHIP_RAVEN: