Fix spacing
authorEddie Hung <eddie@fpgeh.com>
Fri, 21 Jun 2019 23:06:13 +0000 (16:06 -0700)
committerEddie Hung <eddie@fpgeh.com>
Fri, 21 Jun 2019 23:06:13 +0000 (16:06 -0700)
techlibs/xilinx/mux_map.v

index b7ff6ca90f55ef72412bf2550ddf748394801fca..4c1bb7d05dfb250cd6e53405840a0c7b1271fc82 100644 (file)
@@ -52,21 +52,21 @@ module \$shiftx (A, B, Y);
         else
           assign A_without_x[i] = A[i];
 
-        if (B_SIGNED) begin
-          if (B_WIDTH < 4 || A_WIDTH <= 4)
-            wire _TECHMAP_FAIL_ = 1;
-          else
-            // Since negative indices are out of the range of A
-            // and hence return 'bx, drop the sign bit
-            \$__XILINX_SHIFTX #(
-              .A_SIGNED(A_SIGNED),
-              .B_SIGNED(0),
-              .A_WIDTH(A_WIDTH),
-              .B_WIDTH(B_WIDTH-1'd1),
-              .Y_WIDTH(Y_WIDTH)
-            ) _TECHMAP_REPLACE_ (
-              .A(A_without_x), .B(B[B_WIDTH-2:0]), .Y(Y)
-            );
+      if (B_SIGNED) begin
+        if (B_WIDTH < 4 || A_WIDTH <= 4)
+          wire _TECHMAP_FAIL_ = 1;
+        else
+          // Since negative indices are out of the range of A
+          // and hence return 'bx, drop the sign bit
+          \$__XILINX_SHIFTX #(
+            .A_SIGNED(A_SIGNED),
+            .B_SIGNED(0),
+            .A_WIDTH(A_WIDTH),
+            .B_WIDTH($clog2(A_WIDTH*B_WIDTH)),
+            .Y_WIDTH(Y_WIDTH)
+          ) _TECHMAP_REPLACE_ (
+            .A(A_without_x), .B(B[B_WIDTH-2:0]), .Y(Y)
+          );
       end
       else begin
         if (B_WIDTH < 3 || A_WIDTH <= 4)