Code review fixes

diff --git a/passes/memory/memory_share.cc b/passes/memory/memory_share.cc
index 0111c23096ef53348b7bea713312150e2ddbe5a6..8b9d9a04d9177524f06ed2a5a4a80c0ecf51ebf9 100644 (file)
--- a/passes/memory/memory_share.cc
+++ b/passes/memory/memory_share.cc
@@ -670,13 +670,13 @@ struct MemoryShareWorker
 
        void operator()(RTLIL::Module* module)
        {
+               std::map<std::string, std::pair<std::vector<RTLIL::Cell*>, std::vector<RTLIL::Cell*>>> memindex;
+
                this->module = module;
                sigmap.set(module);
                sig_to_mux.clear();
                conditions_logic_cache.clear();
 
-               std::map<std::string, std::pair<std::vector<RTLIL::Cell*>, std::vector<RTLIL::Cell*>>> memindex;
-
                sigmap_xmux = sigmap;
                for (auto cell : module->cells())
                {

diff --git a/passes/opt/opt_expr.cc b/passes/opt/opt_expr.cc
index c1318402532ba1c388ec3ec0e8bf82f2e227d57d..68d6ea82b918993dbe913ec1e591cc5f3b43ba1c 100644 (file)
--- a/passes/opt/opt_expr.cc
+++ b/passes/opt/opt_expr.cc
@@ -31,7 +31,7 @@ PRIVATE_NAMESPACE_BEGIN
 
 bool did_something;
 
-void replace_undriven(RTLIL::Module *module, const CellTypes& ct)
+void replace_undriven(RTLIL::Module *module, const CellTypes &ct)
 {
        SigMap sigmap(module);
        SigPool driven_signals;