2008-11-06 Chao-ying Fu <fu@mips.com>

	* mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
	before sync.
	(sync): New instruction with 5-bit sync type.
	* mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ace3f534717cff0b74f3f61cb4c92b1ba8d363f5..9c36338a1960be165102768422ed76606e25a050 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,10 @@
+2008-11-06  Chao-ying Fu  <fu@mips.com>
+
+       * mips-opc.c (synciobdma, syncs, syncw, syncws): Move these
+       before sync.
+       (sync): New instruction with 5-bit sync type.
+       * mips-dis.c (print_insn_args: Add case '1' to print 5-bit values.
+
 2008-11-06  Nick Clifton  <nickc@redhat.com>
 
        * avr-dis.c: Replace uses of sprintf without a format string with

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 744d5a92bcbb6cd5b17ab17ba960428f4d4e9c3c..7c38589824807c8b9dd6035c3d24a1ba7ec22fa7 100644 (file)
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1104,6 +1104,7 @@ print_insn_args (const char *d,
          break;
 
        case '<':
+       case '1':
          (*info->fprintf_func) (info->stream, "0x%lx",
                                 (l >> OP_SH_SHAMT) & OP_MASK_SHAMT);
          break;

diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index 82a01f87a44599c1737a5df91ae9c5f866fc702a..c2335426284fd221bdf82d93ab639ce2572e6d09 100644 (file)
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -1319,14 +1319,15 @@ const struct mips_opcode mips_builtin_opcodes[] =
 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000,        RD_t|RD_b,              0,              I2      }, /* same */
 {"invalidate", "t,A(b)",0,    (int) M_SWR_AB,  INSN_MACRO,             0,              I2      }, /* as swr */
 {"swxc1",   "S,t(b)",   0x4c000008, 0xfc0007ff, SM|RD_S|RD_t|RD_b|FP_S,        0,              I4_33   },
-{"sync",    "",                0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2|G1   },
-{"sync.p",  "",                0x0000040f, 0xffffffff, INSN_SYNC,              0,              I2      },
-{"sync.l",  "",                0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2      },
-{"synci",   "o(b)",    0x041f0000, 0xfc1f0000, SM|RD_b,                0,              I33     },
 {"synciobdma", "",     0x0000008f, 0xffffffff, INSN_SYNC,              0,              IOCT    },
 {"syncs",   "",                0x0000018f, 0xffffffff, INSN_SYNC,              0,              IOCT    },
 {"syncw",   "",                0x0000010f, 0xffffffff, INSN_SYNC,              0,              IOCT    },
 {"syncws",  "",                0x0000014f, 0xffffffff, INSN_SYNC,              0,              IOCT    },
+{"sync",    "",                0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2|G1   },
+{"sync",    "1",       0x0000000f, 0xfffff83f, INSN_SYNC,              0,              I32     },
+{"sync.p",  "",                0x0000040f, 0xffffffff, INSN_SYNC,              0,              I2      },
+{"sync.l",  "",                0x0000000f, 0xffffffff, INSN_SYNC,              0,              I2      },
+{"synci",   "o(b)",    0x041f0000, 0xfc1f0000, SM|RD_b,                0,              I33     },
 {"syscall", "",                0x0000000c, 0xffffffff, TRAP,                   0,              I1      },
 {"syscall", "B",       0x0000000c, 0xfc00003f, TRAP,                   0,              I1      },
 {"teqi",    "s,j",     0x040c0000, 0xfc1f0000, RD_s|TRAP,              0,              I2      },