radeonsi: Fix off-by-one for maximum vertex element index in some cases
authorMichel Dänzer <michel.daenzer@amd.com>
Tue, 12 Mar 2013 11:34:37 +0000 (12:34 +0100)
committerMichel Dänzer <michel@daenzer.net>
Tue, 12 Mar 2013 17:25:54 +0000 (18:25 +0100)
In cases where the vertex element size is smaller than the vertex buffer
stride, the previous calculation could end up 1 too low. This would result
in the GPU using index 0 instead of the maximum index for those elements,
which would be visible as intermittent distorted triangles.

NOTE: This is a candidate for the 9.1 branch.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
src/gallium/drivers/radeonsi/si_state_draw.c

index f8460b0f823fff23cf1abc843ece0acf0b9e9b9e..1049d2b5ccc32e4676d07af9c59c13951c00ee9b 100644 (file)
@@ -448,8 +448,14 @@ static void si_vertex_buffer_update(struct r600_context *rctx)
                si_pm4_sh_data_add(pm4, va & 0xFFFFFFFF);
                si_pm4_sh_data_add(pm4, (S_008F04_BASE_ADDRESS_HI(va >> 32) |
                                         S_008F04_STRIDE(vb->stride)));
-               si_pm4_sh_data_add(pm4, (vb->buffer->width0 - vb->buffer_offset) /
-                                        MAX2(vb->stride, 1));
+               if (vb->stride)
+                       /* Round up by rounding down and adding 1 */
+                       si_pm4_sh_data_add(pm4,
+                                          (vb->buffer->width0 - offset -
+                                           util_format_get_blocksize(ve->src_format)) /
+                                          vb->stride + 1);
+               else
+                       si_pm4_sh_data_add(pm4, vb->buffer->width0 - offset);
                si_pm4_sh_data_add(pm4, rctx->vertex_elements->rsrc_word3[i]);
 
                if (!bound[ve->vertex_buffer_index]) {