[Patch ARM] Document the +crypto extension on CPUs.

We don't document the list of CPU names which can take a +crypto extension
in the ARM port. This patch fixes that oversight.

gcc/

2017-14-07  James Greenhalgh  <james.greenhalgh@arm.com>

	* doc/invoke.texi (arm/-mcpu): Document +crypto.

From-SVN: r250207

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a9ab5ba4b61b516d1174ee47e0e18c8bdb24d3bf..3c8effb88de95558639b5b524d293babf97e24d9 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,7 @@
+2017-07-14  James Greenhalgh  <james.greenhalgh@arm.com>
+
+       * doc/invoke.texi (arm/-mcpu): Document +crypto.
+
 2017-07-14  Thomas Preud'homme  <thomas.preudhomme@arm.com>
 
        * config/arm/arm-c.c (arm_cpu_builtins): Define

diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 9cf85d10890aa86e3440fe8a7517c015c0f46279..b9d071b3746ad4223260c58f6e177fd0a2c0a534 100644 (file)
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -15636,6 +15636,14 @@ on @samp{cortex-r5}, @samp{cortex-r52} and @samp{cortex-m7}.
 Disables the SIMD (but not floating-point) instructions on
 @samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}
 and @samp{cortex-a9}.
+
+@item +crypto
+Enables the cryptographic instructions on @samp{cortex-a32},
+@samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a55}, @samp{cortex-a57},
+@samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-a75}, @samp{exynos-m1},
+@samp{xgene1}, @samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53},
+@samp{cortex-a73.cortex-a35}, @samp{cortex-a73.cortex-a53} and
+@samp{cortex-a75.cortex-a55}.
 @end table
 
 Additionally the @samp{generic-armv7-a} pseudo target defaults to