re PR target/80510 (Optimize Power7/power8 Altivec load/stores)

2017-06-21  Michael Meissner  <meissner@linux.vnet.ibm.com>

	PR target/80510
	* gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until
	32-bit support is added.  Change ITYPE size to 64-bit integer.
	* gcc.target/powerpc/pr80510-2.c: Likewise.

From-SVN: r249470

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0239d5aeb70863a9ecfe5a969a97ed0b79cb0a8d..fa14c61eed5509382785194e58b995deb944e5df 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,10 @@
+2017-06-21  Michael Meissner  <meissner@linux.vnet.ibm.com>
+
+       PR target/80510
+       * gcc.target/powerpc/pr80510-1.c: Restrict test to 64-bit until
+       32-bit support is added.  Change ITYPE size to 64-bit integer.
+       * gcc.target/powerpc/pr80510-2.c: Likewise.
+
 2017-06-21  Jakub Jelinek  <jakub@redhat.com>
 
        PR c++/81154

diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-1.c b/gcc/testsuite/gcc.target/powerpc/pr80510-1.c
index 7024f3ba2ca40c98a9682603aeaf1ba04d7adce5..d832e927b9f0caaf49ba150a5dd8f71507903faa 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/pr80510-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr80510-1.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_vsx_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power7" } } */
@@ -6,7 +6,9 @@
 
 /* Make sure that STXSDX is generated for double scalars in Altivec registers
    on power7 instead of moving the value to a FPR register and doing a X-FORM
-   store.  */
+   store.
+
+   32-bit currently does not have support for STXSDX in the mov{df,dd} patterns.  */
 
 #ifndef TYPE
 #define TYPE double
@@ -21,7 +23,7 @@
 #endif
 
 #ifndef ITYPE
-#define ITYPE long
+#define ITYPE __INT64_TYPE__
 #endif
 
 #ifdef DO_CALL

diff --git a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c
index 18dc356ebedee43c846d8e1dab89fa649f76c2dc..83a186bedc824daab41c0eddc776093a6b06d110 100644 (file)
--- a/gcc/testsuite/gcc.target/powerpc/pr80510-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/pr80510-2.c
@@ -1,4 +1,4 @@
-/* { dg-do compile { target { powerpc*-*-* } } } */
+/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */
 /* { dg-skip-if "" { powerpc*-*-darwin* } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
@@ -6,7 +6,9 @@
 
 /* Make sure that STXSSPX is generated for float scalars in Altivec registers
    on power7 instead of moving the value to a FPR register and doing a X-FORM
-   store.  */
+   store.
+
+   32-bit currently does not have support for STXSSPX in the mov{sf,sd} patterns.  */
 
 #ifndef TYPE
 #define TYPE float
@@ -21,7 +23,7 @@
 #endif
 
 #ifndef ITYPE
-#define ITYPE long
+#define ITYPE __INT64_TYPE__
 #endif
 
 #ifdef DO_CALL