(const (symbol_ref "(enum attr_cpu) rs6000_tune")))
;; The ISA we implement.
-(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9v,p9kf,p9tf,fut"
+(define_attr "isa" "any,p5,p6,p7,p7v,p8v,p9v,p9kf,p9tf,p10"
(const_string "any"))
;; Is this alternative enabled for the current CPU/ISA/etc.?
(match_test "FLOAT128_VECTOR_P (TFmode)"))
(const_int 1)
- (and (eq_attr "isa" "fut")
+ (and (eq_attr "isa" "p10")
(match_test "TARGET_POWER10"))
(const_int 1)
] (const_int 0)))
addis %0,%1,%v2
addi %0,%1,%2"
[(set_attr "type" "add")
- (set_attr "isa" "*,*,*,fut")])
+ (set_attr "isa" "*,*,*,p10")])
(define_insn "*addsi3_high"
[(set (match_operand:SI 0 "gpc_reg_operand" "=b")
"*, *,
*, p8v, p8v,
*, p8v, p8v,
- *, *, fut, *,
+ *, *, p10, *,
p8v, p9v, p9v, p8v,
p9v, p8v, p9v,
p8v, p8v,
*, *")
(set_attr "isa"
"*, *, *,
- *, *, fut, *,
+ *, *, p10, *,
*, *, *,
p9v, p7v, p9v, p7v, *,
p9v, p9v, p7v, *, *,