(1 << 18) | (1 << 31)); \
} while (0)
+#define R300_SCREENDOOR do { \
+ OUT_CS_REG(R300_SC_SCREENDOOR, 0x0); \
+ R300_PACIFY; \
+ OUT_CS_REG(R300_SC_SCREENDOOR, 0xffffff); \
+} while (0)
#endif /* R300_CS_H */
{
CS_LOCALS(r300);
int i = 0;
- BEGIN_CS(11 + (fs->instruction_count * 6));
+ BEGIN_CS(9 + (fs->instruction_count * 6));
OUT_CS_REG(R500_US_CONFIG, R500_ZERO_TIMES_ANYTHING_EQUALS_ZERO);
OUT_CS_REG(R500_US_PIXSIZE, fs->shader.stack_size);
OUT_CS_REG(R500_US_CODE_ADDR, R500_US_CODE_START_ADDR(0) |
OUT_CS(fs->instructions[i].inst4);
OUT_CS(fs->instructions[i].inst5);
}
- R300_PACIFY;
END_CS;
}
struct r300_texture* tex;
int i;
- BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 6);
+ BEGIN_CS((5 * fb->nr_cbufs) + (fb->zsbuf ? 5 : 0) + 4);
for (i = 0; i < fb->nr_cbufs; i++) {
tex = (struct r300_texture*)fb->cbufs[i]->texture;
OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
- R300_PACIFY;
END_CS;
}
return;
}
- BEGIN_CS(164 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2));
- R300_PACIFY;
+ BEGIN_CS(158 + (caps->is_r500 ? 22 : 14) + (caps->has_tcl ? 4 : 2));
/* Flush PVS. */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
OUT_CS_REG(R300_SU_DEPTH_OFFSET, 0x00000000);
OUT_CS_REG(R300_SC_HYPERZ, 0x0000001C);
OUT_CS_REG(R300_SC_EDGERULE, 0x2DA49525);
- OUT_CS_REG(R300_SC_SCREENDOOR, 0x00FFFFFF);
OUT_CS_REG(R300_FG_FOG_BLEND, 0x00000002);
OUT_CS_REG(R300_FG_FOG_COLOR_R, 0x00000000);
OUT_CS_REG(R300_FG_FOG_COLOR_G, 0x00000000);
OUT_CS_REG(0x4F34, 0x00000000); */
OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0x00000000);
OUT_CS_REG(R300_ZB_HIZ_PITCH, 0x00000000);
- R300_PACIFY;
if (caps->has_tcl) {
OUT_CS_REG(R300_VAP_PROG_STREAM_CNTL_0,
(R300_DATA_TYPE_FLOAT_4 << R300_DATA_TYPE_0_SHIFT) |
r300_emit_fragment_shader(r300, &r300_passthrough_fragment_shader);
}
- BEGIN_CS(8 + (caps->has_tcl ? 23 : 2));
+ BEGIN_CS(8 + (caps->has_tcl ? 20 : 2));
OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
OUT_CS(R300_C0_SEL_B | R300_C1_SEL_G | R300_C2_SEL_R | R300_C3_SEL_A);
OUT_CS(R300_US_OUT_FMT_UNUSED);
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_0, 0x00100000);
OUT_CS_REG(R300_VAP_PVS_CONST_CNTL, 0x00000000);
OUT_CS_REG(R300_VAP_PVS_CODE_CNTL_1, 0x00000001);
- R300_PACIFY;
/* XXX translate these back into normal instructions */
OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x1);
OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0x0);
(0x5 << R300_VF_MAX_VTX_NUM_SHIFT) |
(caps->num_vert_fpus << R300_PVS_NUM_FPUS_SHIFT));
}
- R300_PACIFY;
END_CS;
r300_emit_blend_state(r300, &blend_clear_state);
r300_emit_blend_color_state(r300, &blend_color_clear_state);
r300_emit_dsa_state(r300, &dsa_clear_state);
- BEGIN_CS(32);
- R300_PACIFY;
+ BEGIN_CS(24);
/* Flush colorbuffer and blend caches. */
OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D |
/* XXX OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE); */
- R300_SCREENDOOR;
END_CS;
- FLUSH_CS;
- r300->dirty_state = R300_NEW_KITCHEN_SINK;
+ r300->dirty_hw++;
}
void r300_init_surface_functions(struct r300_context* r300)
return (struct swtcl_stage*)draw;
}
-static void r300_emit_vertex(struct r300_context* r300,
- const struct vertex_header* vertex)
+static INLINE void r300_emit_vertex(struct r300_context* r300,
+ const struct vertex_header* vertex)
{
- /* XXX */
+ struct vertex_info* vinfo = &r300->vertex_info;
+ CS_LOCALS(r300);
+ uint i, j;
+
+ BEGIN_CS(vinfo->size);
+
+ for (i = 0; i < vinfo->num_attribs; i++) {
+ j = vinfo->attrib[i].src_index;
+ switch (vinfo->attrib[i].emit) {
+ case EMIT_1F:
+ CS_OUT_32F(vertex->data[j][0]);
+ break;
+ case EMIT_2F:
+ CS_OUT_32F(vertex->data[j][0]);
+ CS_OUT_32F(vertex->data[j][1]);
+ break;
+ case EMIT_3F:
+ CS_OUT_32F(vertex->data[j][0]);
+ CS_OUT_32F(vertex->data[j][1]);
+ CS_OUT_32F(vertex->data[j][2]);
+ break;
+ case EMIT_4F:
+ CS_OUT_32F(vertex->data[j][0]);
+ CS_OUT_32F(vertex->data[j][1]);
+ CS_OUT_32F(vertex->data[j][2]);
+ CS_OUT_32F(vertex->data[j][3]);
+ break;
+ default:
+ debug_printf("r300: Unknown emit value %d\n",
+ vinfo->attrib[i].emit);
+ break;
+ }
+ }
+
+ END_CS;
}
static INLINE void r300_emit_prim(struct draw_stage* draw,
r300_emit_dirty_state(r300);
- /* XXX should be count * vtx size */
- BEGIN_CS(2 + count + 6);
+ BEGIN_CS(3);
+ OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
+ OUT_CS(r300->vertex_info.hwfmt[0]);
+ OUT_CS(r300->vertex_info.hwfmt[1]);
+
+ BEGIN_CS(2 + (count * r300->vertex_info.size) + 2);
OUT_CS(CP_PACKET3(R200_3D_DRAW_IMMD_2, count));
OUT_CS(hwprim | R300_PRIM_WALK_RING |
(count << R300_PRIM_NUM_VERTICES_SHIFT));
for (i = 0; i < count; i++) {
r300_emit_vertex(r300, prim->v[i]);
}
- R300_PACIFY;
+
END_CS;
}