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diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 8a578031f76101bc48409f26c34c7aa6fcb0fd0c..ddf51a6dde9aefb9ffaadcbb8a721a2521ff63ba 100644 (file)
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -375,7 +375,7 @@ Notes from Jacob: CR6-7 allows Scalar ops to refer to these without having to do
 
 # Extra Remapped Encoding
 
-Shows all instruction-specific fields in the Remapped Encoding `RM[8:18]` for all instruction variants.  Note that due to the very tight space, the encoding mode is *not* included in the prefix itself.  The mode is "applied", similar to OpenPOWER "Forms" (X-Form, D-Form) on a per-instruction basis, and, like "Forms" are given a designation (below) of the form `RM-nP-nSnD`. The full list of which instructions use which remaps is here [[opcode_regs_deduped]]. (*Machine-readable CSV files have been provided which will make the task of creating SV-aware ISA decoders easier*).
+Shows all instruction-specific fields in the Remapped Encoding `RM[10:18]` for all instruction variants.  Note that due to the very tight space, the encoding mode is *not* included in the prefix itself.  The mode is "applied", similar to OpenPOWER "Forms" (X-Form, D-Form) on a per-instruction basis, and, like "Forms" are given a designation (below) of the form `RM-nP-nSnD`. The full list of which instructions use which remaps is here [[opcode_regs_deduped]]. (*Machine-readable CSV files have been provided which will make the task of creating SV-aware ISA decoders easier*).
 
 There are two categories:  Single and Twin Predication.
 Due to space considerations further subdivision of Single Predication