opcodes/
authorYufeng Zhang <yufeng.zhang@arm.com>
Tue, 5 Nov 2013 20:46:24 +0000 (20:46 +0000)
committerYufeng Zhang <yufeng.zhang@arm.com>
Tue, 5 Nov 2013 20:46:24 +0000 (20:46 +0000)
* aarch64-opc.c (set_syntax_error): New function.
(operand_general_constraint_met_p): Replace set_other_error
with set_syntax_error.

gas/testsuite/

* gas/aarch64/diagnostic.s: Add tests of ldp/stp.
* gas/aarch64/diagnostic.l: Update.

gas/testsuite/ChangeLog
gas/testsuite/gas/aarch64/diagnostic.l
gas/testsuite/gas/aarch64/diagnostic.s
opcodes/ChangeLog
opcodes/aarch64-opc.c

index 19a61388b84409432cacd8909d76b5a3b8c35a69..8e8cdc56632342e420a40d5d2f85984eb5d84c66 100644 (file)
@@ -1,3 +1,8 @@
+2013-11-05  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * gas/aarch64/diagnostic.s: Add tests of ldp/stp.
+       * gas/aarch64/diagnostic.l: Update.
+
 2013-11-05  Will Newton  <will.newton@linaro.org>
 
        * gas/aarch64/advsimd-mov-bad.d: New file.
index cca8881bc0a43191cfd5839cf784b131f5ec1502..015e16ae3ff521419fd3ea09c62daeb7826c3d27 100644 (file)
@@ -87,3 +87,9 @@
 [^:]*:89: Error: shift amount expected to be 0 at operand 2 -- `movi v1.8b,97,lsl#8'
 [^:]*:90: Error: unknown or missing system register name at operand 1 -- `msr dummy,x1'
 [^:]*:91: Error: invalid floating-point constant at operand 2 -- `fmov s0,0x42000000'
+[^:]*:92: Error: immediate value should be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2,#4\]'
+[^:]*:93: Error: immediate value should be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2,#4\]!'
+[^:]*:94: Error: immediate value should be a multiple of 8 at operand 3 -- `ldp x0,x1,\[x2\],#4'
+[^:]*:95: Error: immediate value should be a multiple of 4 at operand 3 -- `stp w0,w1,\[x2,#3\]'
+[^:]*:96: Error: immediate value should be a multiple of 4 at operand 3 -- `stp w0,w1,\[x2,#2\]!'
+[^:]*:97: Error: immediate value should be a multiple of 4 at operand 3 -- `stp w0,w1,\[x2\],#1'
index e5443ab750d865493a24486dfbc9bcfe617396a5..afa04b52749dbf66d655146b702010bceb269c9d 100644 (file)
@@ -89,3 +89,9 @@
        movi    v1.8b, 97, lsl #8
        msr     dummy, x1
        fmov    s0, 0x42000000
+       ldp     x0, x1, [x2, #4]
+       ldp     x0, x1, [x2, #4]!
+       ldp     x0, x1, [x2], #4
+       stp     w0, w1, [x2, #3]
+       stp     w0, w1, [x2, #2]!
+       stp     w0, w1, [x2], #1
index c96df92b04fe03485d23edb2a32552a60f5e5070..424c27f56568f5f43ad408e0159fdc9b4a0e0629 100644 (file)
@@ -1,3 +1,9 @@
+2013-11-05  Yufeng Zhang  <yufeng.zhang@arm.com>
+
+       * aarch64-opc.c (set_syntax_error): New function.
+       (operand_general_constraint_met_p): Replace set_other_error
+       with set_syntax_error.
+
 2013-10-30  Andreas Arnez  <arnez@linux.vnet.ibm.com>
 
        * s390-dis.c (init_disasm): Default to full 'zarch' opcode
index f32ee5ec2f2f86750b2692d3a65523cf9a56f838..0d16bd64767c5acfccae5221c679118839a5e39d 100644 (file)
@@ -1121,6 +1121,15 @@ set_error (aarch64_operand_error *mismatch_detail,
   mismatch_detail->error = error;
 }
 
+static inline void
+set_syntax_error (aarch64_operand_error *mismatch_detail, int idx,
+                 const char* error)
+{
+  if (mismatch_detail == NULL)
+    return;
+  set_error (mismatch_detail, AARCH64_OPDE_SYNTAX_ERROR, idx, error);
+}
+
 static inline void
 set_out_of_range_error (aarch64_operand_error *mismatch_detail,
                        int idx, int lower_bound, int upper_bound,
@@ -1288,8 +1297,8 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
        case ldst_unpriv:
          if (opnd->addr.writeback == 1)
            {
-             set_other_error (mismatch_detail, idx,
-                              _("unexpected address writeback"));
+             set_syntax_error (mismatch_detail, idx,
+                               _("unexpected address writeback"));
              return 0;
            }
          break;
@@ -1299,8 +1308,8 @@ operand_general_constraint_met_p (const aarch64_opnd_info *opnds, int idx,
        case asisdlsop:
          if (opnd->addr.writeback == 0)
            {
-             set_other_error (mismatch_detail, idx,
-                              _("address writeback expected"));
+             set_syntax_error (mismatch_detail, idx,
+                               _("address writeback expected"));
              return 0;
            }
          break;