platforms/rhino: add GPMC wait pin

diff --git a/mibuild/platforms/rhino.py b/mibuild/platforms/rhino.py
index 4609d1bb83d2d4a89fea7c8afbfd3f87bb8d3275..87a22d9d117cf69d5e6ce2359bfe750f9b86ee16 100644 (file)
--- a/mibuild/platforms/rhino.py
+++ b/mibuild/platforms/rhino.py
@@ -25,6 +25,7 @@ _io = [
                Subsignal("we_n", Pins("W26")),
                Subsignal("oe_n", Pins("AA25")),
                Subsignal("ale_n", Pins("AA26")),
+               Subsignal("wait", Pins("AD26")), # WAIT1/BUSY0
                IOStandard("LVCMOS33")),
        # Warning: CS are numbered 1-7 on ARM side and 0-6 on FPGA side.
        # Numbers here are given on the FPGA side.