ARM: Improve memory instruction disassembly.

diff --git a/src/arch/arm/insts/mem.cc b/src/arch/arm/insts/mem.cc
index 7909330aacb7735c1215a9a9111d15d18d27890f..afbf05e44eab9f79796a52cee74e3ec3e1860492 100644 (file)
--- a/src/arch/arm/insts/mem.cc
+++ b/src/arch/arm/insts/mem.cc
@@ -37,14 +37,17 @@ Memory::generateDisassembly(Addr pc, const SymbolTable *symtab) const
 {
     std::stringstream ss;
     printMnemonic(ss);
-    return ss.str();
-}
-
-std::string
-MemoryNoDisp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
-{
-    std::stringstream ss;
-    printMnemonic(ss);
+    printReg(ss, machInst.rd);
+    ss << ", [";
+    printReg(ss, machInst.rn);
+    ss << ", ";
+    if (machInst.puswl.prepost == 1)
+        printOffset(ss);
+    ss << "]";
+    if (machInst.puswl.prepost == 0)
+        printOffset(ss);
+    else if (machInst.puswl.writeback)
+        ss << "!";
     return ss.str();
 }
 }

diff --git a/src/arch/arm/insts/mem.hh b/src/arch/arm/insts/mem.hh
index a5c64a86c13b685606de98af41b826c0ef45a20e..bf0aa1c92987ce4e47bae10c9ebe151abd7f0429 100644 (file)
--- a/src/arch/arm/insts/mem.hh
+++ b/src/arch/arm/insts/mem.hh
@@ -65,23 +65,75 @@ class Memory : public PredOp
 
     std::string
     generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+
+    virtual void
+    printOffset(std::ostream &os) const
+    {}
 };
 
- /**
- * Base class for a few miscellaneous memory-format insts
- * that don't interpret the disp field
- */
-class MemoryNoDisp : public Memory
+class MemoryDisp : public Memory
 {
   protected:
     /// Constructor
-    MemoryNoDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+    MemoryDisp(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
         : Memory(mnem, _machInst, __opClass)
     {
     }
 
-    std::string
-    generateDisassembly(Addr pc, const SymbolTable *symtab) const;
+    void
+    printOffset(std::ostream &os) const
+    {
+        ccprintf(os, "#%#x", (machInst.puswl.up ? disp : -disp));
+    }
+};
+
+class MemoryHilo : public Memory
+{
+  protected:
+    /// Constructor
+    MemoryHilo(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+        : Memory(mnem, _machInst, __opClass)
+    {
+    }
+
+    void
+    printOffset(std::ostream &os) const
+    {
+        ccprintf(os, "#%#x", (machInst.puswl.up ? hilo : -hilo));
+    }
+};
+
+class MemoryShift : public Memory
+{
+  protected:
+    /// Constructor
+    MemoryShift(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+        : Memory(mnem, _machInst, __opClass)
+    {
+    }
+
+    void
+    printOffset(std::ostream &os) const
+    {
+        printShiftOperand(os);
+    }
+};
+
+class MemoryReg : public Memory
+{
+  protected:
+    /// Constructor
+    MemoryReg(const char *mnem, ExtMachInst _machInst, OpClass __opClass)
+        : Memory(mnem, _machInst, __opClass)
+    {
+    }
+
+    void
+    printOffset(std::ostream &os) const
+    {
+        os << (machInst.puswl.up ? "+ " : "- ");
+        printReg(os, machInst.rm);
+    }
 };
 }
 

diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index 2bdd568c7c58ec2ce35234dff1dda31b3ecb2852..0b0a4c9fa4b27c089e8469c8c83504c8636930e7 100644 (file)
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -276,11 +276,12 @@ let {{
             # Here's where we'll tack on a flag to make this a usermode access.
             mnem += "t"
         type = ("Store", "Load")[l]
-        suffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
+        newSuffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
         if b == 1:
             mnem += "b"
-        return LoadStoreBase(mnem, mnem.capitalize() + suffix,
+        return LoadStoreBase(mnem, mnem.capitalize() + newSuffix,
                 ea_code, code, mem_flags = [], inst_flags = [],
+                base_class = 'Memory' + suffix,
                 exec_template_base = type.capitalize())
 
     def buildMode3Inst(p, u, i, w, type, code, mnem):
@@ -289,9 +290,11 @@ let {{
         ea_code = "EA = Rn %s;" % ("", offset)[p]
         if p == 0 or w == 1:
             code += "Rn = Rn %s;" % offset
-        suffix = "_P%dU%dI%dW%d" % (p, u, i, w)
-        return LoadStoreBase(mnem, mnem.capitalize() + suffix,
+        newSuffix = "_P%dU%dI%dW%d" % (p, u, i, w)
+        suffix = ("Reg", "Hilo")[i]
+        return LoadStoreBase(mnem, mnem.capitalize() + newSuffix,
                 ea_code, code, mem_flags = [], inst_flags = [],
+                base_class = 'Memory' + suffix,
                 exec_template_base = type.capitalize())
 }};