[AArch64] Robustify aarch64_wrffr

This patch uses distinct values for the FFR and FFRT outputs of
aarch64_wrffr, so that a following aarch64_copy_ffr_to_ffrt has
an effect.  This is needed to avoid regressions with later patches.

The block comment at the head of the file already described
the pattern this way, and there was already an unspec for it.
Not sure what made me change it...

2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>

gcc/
	* config/aarch64/aarch64-sve.md (aarch64_wrffr): Wrap the FFRT
	output in UNSPEC_WRFFR.

From-SVN: r278356

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index e99cfe70d1018c9c85d0b2b7c5a640444de21ef3..48c09573bc59e8214b11d949a2ced77fe3a2c210 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
+
+       * config/aarch64/aarch64-sve.md (aarch64_wrffr): Wrap the FFRT
+       output in UNSPEC_WRFFR.
+
 2019-11-16  Richard Sandiford  <richard.sandiford@arm.com>
 
        * tree-data-ref.c (create_intersect_range_checks_index): Rewrite

diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index cdc3b4c3f4a6e273235369b4f8bf2c413b1c5343..4427609b57907c47f6abd23a6137babd65586e3f 100644 (file)
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -984,7 +984,7 @@
   [(set (reg:VNx16BI FFR_REGNUM)
        (match_operand:VNx16BI 0 "aarch64_simd_reg_or_minus_one" "Dm, Upa"))
    (set (reg:VNx16BI FFRT_REGNUM)
-       (match_dup 0))]
+       (unspec:VNx16BI [(match_dup 0)] UNSPEC_WRFFR))]
   "TARGET_SVE"
   "@
    setffr