add LDST msr_pr to gtkw debug
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 10 Nov 2021 19:10:40 +0000 (19:10 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Wed, 10 Nov 2021 19:10:40 +0000 (19:10 +0000)
src/openpower/test/runner.py

index f7ce218691e67a35f23742d2e719532b80d9f3b4..182739c99fb1320c6686ac791922e5dd039b3b4b 100644 (file)
@@ -393,6 +393,7 @@ class TestRunnerBase(FHDLTestCase):
             'ldst_port0_st_data_i_ok',
             'ldst_port0_ld_data_o[63:0]',
             'ldst_port0_ld_data_o_ok',
+            'ldst_port0_msr_pr',
             'exc_o_happened',
             'cancel'
         ])]