Allow bit-patterns in the immediate field of ARM neon mov instructions.

	* config/tc-arm.c (do_neon_mov): When converting an integer
	immediate into a floating point value, check that the conversion
	is valid.  Also warn if the immediate is valid as both a floating
	point value and a bit pattern.
	* testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
	floating point bit patterns.
	* testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
	of the new insns.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 166c566e4cc445c934b089d69fb0297d9c9444b5..a0406ce36510ce37ced452f241d2c4eba0278c1e 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,14 @@
+2018-07-13  Nick Clifton  <nickc@redhat.com>
+
+       * config/tc-arm.c (do_neon_mov): When converting an integer
+       immediate into a floating point value, check that the conversion
+       is valid.  Also warn if the immediate is valid as both a floating
+       point value and a bit pattern.
+       * testsuite/gas/arm/vfp-mov-enc.s: Add instructions that use
+       floating point bit patterns.
+       * testsuite/gas/arm/vfp-mov-enc.d: Add regexps for the disassembly
+       of the new insns.
+
 2018-07-12  Sudakshina Das  <sudi.das@arm.com>
 
        * testsuite/gas/aarch64/system.s: Add test for ssbb

diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 9f3988a64430918266f30274f0e4f4d11159b0a2..3f5384e1c719de9fedf5a753abbe66c29a2e2afb 100644 (file)
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -16692,13 +16692,24 @@ do_neon_mov (void)
     case NS_HI:
     case NS_FI:  /* case 10 (fconsts).  */
       ldconst = "fconsts";
-      encode_fconstd:
+    encode_fconstd:
       if (!inst.operands[1].immisfloat)
        {
+         unsigned new_imm;
          /* Immediate has to fit in 8 bits so float is enough.  */
-         float imm = (float)inst.operands[1].imm;
-         memcpy (&inst.operands[1].imm, &imm, sizeof (float));
-         inst.operands[1].immisfloat = 1;
+         float imm = (float) inst.operands[1].imm;
+         memcpy (&new_imm, &imm, sizeof (float));
+         /* But the assembly may have been written to provide an integer
+            bit pattern that equates to a float, so check that the
+            conversion has worked.  */
+         if (is_quarter_float (new_imm))
+           {
+             if (is_quarter_float (inst.operands[1].imm))
+               as_warn (_("immediate constant is valid both as a bit-pattern and a floating point value (using the fp value)"));
+
+             inst.operands[1].imm = new_imm;
+             inst.operands[1].immisfloat = 1;
+           }
        }
 
       if (is_quarter_float (inst.operands[1].imm))

diff --git a/gas/testsuite/gas/arm/vfp-mov-enc.d b/gas/testsuite/gas/arm/vfp-mov-enc.d
index 5c4b266e8aa2bebbe91316da65bd7c9b6162e35a..fda47f2b4380dac82d3f135db93186d675e24582 100644 (file)
--- a/gas/testsuite/gas/arm/vfp-mov-enc.d
+++ b/gas/testsuite/gas/arm/vfp-mov-enc.d
@@ -11,3 +11,6 @@ Disassembly of section .text:
 0[0-9a-f]+ <[^>]+> 4ef7da00    vmovmi.f32      s27, #112       ; 0x3f800000  1.0
 0[0-9a-f]+ <[^>]+> cebb1b04    vmovgt.f64      d1, #180        ; 0xc1a00000 -20.0
 0[0-9a-f]+ <[^>]+> ceb81b00    vmovgt.f64      d1, #128        ; 0xc0000000 -2.0
+0[0-9a-f]+ <[^>]+> eef0aa00    vmov.f32        s21, #0 ; 0x40000000  2.0
+0[0-9a-f]+ <[^>]+> eef97a07    vmov.f32        s15, #151       ; 0xc0b80000 -5.750
+0[0-9a-f]+ <[^>]+> eefc4a05    vmov.f32        s9, #197        ; 0xbe280000 -0.1640625

diff --git a/gas/testsuite/gas/arm/vfp-mov-enc.s b/gas/testsuite/gas/arm/vfp-mov-enc.s
index 4362fb1d399f9495d443e6a0ebd1bf1e775e1dee..049f46b5f26f1ab6e8b70d951c17ccc961725fb4 100644 (file)
--- a/gas/testsuite/gas/arm/vfp-mov-enc.s
+++ b/gas/testsuite/gas/arm/vfp-mov-enc.s
@@ -4,3 +4,7 @@ VMOVMI.F32 s27,#1
 VMOVMI.F32 s27,#1.0
 VMOVGT.F64 d1,#-20
 VMOVGT.F64 d1,#-2
+       @ Check that integer-encoded floating-point bit-patterns still work
+       vmov s21,#0x40000000
+       vmov s15,#0xc0b80000
+       vmov  s9,#0xbe280000