(no commit message)

diff --git a/openpower/sv/rfc/ls012.mdwn b/openpower/sv/rfc/ls012.mdwn
index 5e48b6e7ba8b84f6afff79538fb4d1c70c7db818..203be7617eb73d893fd9b9ded356458a9b0b86a3 100644 (file)
--- a/openpower/sv/rfc/ls012.mdwn
+++ b/openpower/sv/rfc/ls012.mdwn
@@ -187,7 +187,7 @@ specialist.
 
 Found at [[sv/av_opcodes]] these do not require Saturated variants
 because Saturation is added via [[sv/svp64]] (Vector Prefixing) and
-via [[sv/svp64_single]] Scalar Prefixing. This is important to note for
+via [[sv/svp64-single]] Scalar Prefixing. This is important to note for
 Opcode Allocation because placing these operations in the UnVectoriseable
 areas would irredeemably damage their value.  Unlike PackedSIMD ISAs
 the actual number of AV Opcodes is remarkably small once the usual