[ARM] Add support for -mcpu=cortex-a72 and -mcpu=cortex-a72.cortex-a53
authorMatthew Wahab <matthew.wahab@arm.com>
Wed, 4 Feb 2015 13:34:58 +0000 (13:34 +0000)
committerJames Greenhalgh <jgreenhalgh@gcc.gnu.org>
Wed, 4 Feb 2015 13:34:58 +0000 (13:34 +0000)
gcc/

* config/arm/arm-cores.def: Add cortex-a72 and
cortex-a72.cortex-a53.
* config/arm/bpabi.h (BE8_LINK_SPEC): Likewise.
* config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
* config/arm/arm-tune.md: Regenerate.
* config/arm/arm-tables.opt: Add entries for "cortex-a72" and
"cortex-a72.cortex-a53".
* doc/invoke.texi (ARM Options/-mtune): Likewise.

From-SVN: r220399

gcc/ChangeLog
gcc/config/arm/arm-cores.def
gcc/config/arm/arm-tables.opt
gcc/config/arm/arm-tune.md
gcc/config/arm/bpabi.h
gcc/config/arm/t-aprofile
gcc/doc/invoke.texi

index 7a6963577acf4b6da0a43cc518c32653fdb8d986..e01618e14374bb6c252684e5bbc3de05144a3717 100644 (file)
@@ -1,3 +1,14 @@
+2015-02-04  Matthew Wahab  <matthew.wahab@arm.com>
+
+       * config/arm/arm-cores.def: Add cortex-a72 and
+       cortex-a72.cortex-a53.
+       * config/arm/bpabi.h (BE8_LINK_SPEC): Likewise.
+       * config/arm/t-aprofile (MULTILIB_MATCHES): Likewise.
+       * config/arm/arm-tune.md: Regenerate.
+       * config/arm/arm-tables.opt: Add entries for "cortex-a72" and
+       "cortex-a72.cortex-a53".
+       * doc/invoke.texi (ARM Options/-mtune): Likewise.
+
 2015-02-04  Nick Clifton  <nickc@redhat.com>
 
        * config/msp430/msp430.c (msp430_use_f5_series_hwmult): Add more
index f24fefd2a80ed5953b7515af59528dc21385901e..d7e730d77f3619276fe3ce053f4a3a1144253280 100644 (file)
@@ -167,7 +167,9 @@ ARM_CORE("cortex-a17.cortex-a7", cortexa17cortexa7, cortexa7,       7A,  FL_LDSCHED |
 /* V8 Architecture Processors */
 ARM_CORE("cortex-a53", cortexa53, cortexa53,   8A, FL_LDSCHED | FL_CRC32, cortex_a53)
 ARM_CORE("cortex-a57", cortexa57, cortexa57,   8A, FL_LDSCHED | FL_CRC32, cortex_a57)
+ARM_CORE("cortex-a72", cortexa72, cortexa57,   8A, FL_LDSCHED | FL_CRC32, cortex_a57)
 ARM_CORE("xgene1",      xgene1,    xgene1,      8A, FL_LDSCHED,            xgene1)
 
 /* V8 big.LITTLE implementations */
 ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A,  FL_LDSCHED | FL_CRC32, cortex_a57)
+ARM_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A,  FL_LDSCHED | FL_CRC32, cortex_a57)
index 1392429d74fb92bf3e80f12436834f35e0428bf7..3450e5b62af2ddf52afba66fb9670ca1abd3dc20 100644 (file)
@@ -309,12 +309,18 @@ Enum(processor_type) String(cortex-a53) Value(cortexa53)
 EnumValue
 Enum(processor_type) String(cortex-a57) Value(cortexa57)
 
+EnumValue
+Enum(processor_type) String(cortex-a72) Value(cortexa72)
+
 EnumValue
 Enum(processor_type) String(xgene1) Value(xgene1)
 
 EnumValue
 Enum(processor_type) String(cortex-a57.cortex-a53) Value(cortexa57cortexa53)
 
+EnumValue
+Enum(processor_type) String(cortex-a72.cortex-a53) Value(cortexa72cortexa53)
+
 Enum
 Name(arm_arch) Type(int)
 Known ARM architectures (for use with the -march= option):
index dcd505423f68e531f8ff2eaf361a39b8dbf7fa97..d459f27c98cfebd592949c893f48d003b238c82a 100644 (file)
@@ -32,6 +32,6 @@
        cortexr4f,cortexr5,cortexr7,
        cortexm7,cortexm4,cortexm3,
        marvell_pj4,cortexa15cortexa7,cortexa17cortexa7,
-       cortexa53,cortexa57,xgene1,
-       cortexa57cortexa53"
+       cortexa53,cortexa57,cortexa72,
+       xgene1,cortexa57cortexa53,cortexa72cortexa53"
        (const (symbol_ref "((enum attr_tune) arm_tune)")))
index 8e164340ac7540c8a4ccc6611e24ea156577c423..c62130d7919dc64e6d2faecb58039b28641cd75e 100644 (file)
@@ -71,6 +71,8 @@
    |mcpu=cortex-a53                                    \
    |mcpu=cortex-a57                                    \
    |mcpu=cortex-a57.cortex-a53                         \
+   |mcpu=cortex-a72                                    \
+   |mcpu=cortex-a72.cortex-a53                         \
    |mcpu=xgene1                                         \
    |mcpu=cortex-m1.small-multiply                       \
    |mcpu=cortex-m0.small-multiply                       \
@@ -93,6 +95,8 @@
    |mcpu=cortex-a53                                    \
    |mcpu=cortex-a57                                    \
    |mcpu=cortex-a57.cortex-a53                         \
+   |mcpu=cortex-a72                                    \
+   |mcpu=cortex-a72.cortex-a53                         \
    |mcpu=xgene1                                         \
    |mcpu=cortex-m1.small-multiply                       \
    |mcpu=cortex-m0.small-multiply                       \
index 6a280bdf54ac8bd48213d24b2085ce7ec8da9742..e8b2aa36cbba81cf707e79531a53df85ee20d6fc 100644 (file)
@@ -89,6 +89,8 @@ MULTILIB_MATCHES       += march?armv7ve=mcpu?cortex-a17.cortex-a7
 MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a53
 MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a57
 MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a57.cortex-a53
+MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a72
+MULTILIB_MATCHES       += march?armv8-a=mcpu?cortex-a72.cortex-a53
 
 # Arch Matches
 MULTILIB_MATCHES       += march?armv8-a=march?armv8-a+crc
index ba81ec7a7d84d5cd143cabd353682d3dcff8335a..0aae187374001427fa7fc351e89646d750aaa453 100644 (file)
@@ -12962,7 +12962,8 @@ Permissible names are: @samp{arm2}, @samp{arm250},
 @samp{arm1136j-s}, @samp{arm1136jf-s}, @samp{mpcore}, @samp{mpcorenovfp},
 @samp{arm1156t2-s}, @samp{arm1156t2f-s}, @samp{arm1176jz-s}, @samp{arm1176jzf-s},
 @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9},
-@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53}, @samp{cortex-a57},
+@samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a53},
+@samp{cortex-a57}, @samp{cortex-a72},
 @samp{cortex-r4},
 @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-m7},
 @samp{cortex-m4},
@@ -12981,7 +12982,8 @@ Permissible names are: @samp{arm2}, @samp{arm250},
 
 Additionally, this option can specify that GCC should tune the performance
 of the code for a big.LITTLE system.  Permissible names are:
-@samp{cortex-a15.cortex-a7}, @samp{cortex-a57.cortex-a53}.
+@samp{cortex-a15.cortex-a7}, @samp{cortex-a57.cortex-a53},
+@samp{cortex-a72.cortex-a53}.
 
 @option{-mtune=generic-@var{arch}} specifies that GCC should tune the
 performance for a blend of processors within architecture @var{arch}.